California Institute of Technology

United States of America As Represented by the Administrator of Nasa

Goutam Chattopadhyay

Choonsup Lee

Imran Mehdi

Cecile D Jung-Kubiak

Robert H Lin

John J Gill

Ken B Cooper

Theodore J Reck

Alejandro Peralta

Peter H Siegel

Jose Vicente Siles Perez

Erich T Schlecht

Emmanuel Decrossas

Sofia Rahiminejad

Jose V Siles

Harish M Manohara

Adrian Tang

Nacer Chahat

Risaku Toda

John Strawn Ward

Robert J Dengler

Bertrand Thomas

Nuria Llombart Juan

Anders J Skalare

Kyung-Ah Son

David Z Ting

Mohammad Mehdi Mojarradi

Anna Liao

Tomas Bryllert

JeongSun Moon

Jan A Tarsala

Maria A Del Pino

Nuria Llombart

Sven L Van Berkel

Jacob W Kooi

Subash Khanal

David Gonzalez-Ovejero

Seth Sin

Maria Alonso delPino

Hadi Mojaradi

A waveguide based variable attenuator device including one or more attenuators each including a porous dielectric material; and a metal coating on the top of the dielectric material; and an actuator coupled to the attenuator. The actuator is configured to position, with nanometer resolution, the one or more attenuators in a waveguide configured and dimensioned to guide an electromagnetic wave having a frequency in a range of 100 gigahertz (GHz) to 1 terahertz (THz). The actuator controls at least one of a position or a volume of the one attenuator inserted in the waveguide to achieve a variable or pre-determined attenuation of the electromagnetic wave transmitted through waveguide.

Waveguide based submillimmeter-wave and terahertz variable attenuator

Low-loss terahertz switches with nanometer resolution positioning and feedback are disclosed. In one embodiment, the switch uses a U-bend waveguide surrounded by an electromagnetic band gap and is implemented in a fully metal-machined fashion in combination with a piezo-electric motor and an optical linear encoder. In another embodiment, the switch comprises a MEMS device.

Terahertz waveguide switches

A set of antenna geometries for use in integrated arrays at terahertz frequencies are described. Two fabrication techniques to construct such antennas are presented. The first technique uses an advanced laser micro-fabrication, allowing fabricating advanced 3D geometries. The second technique uses photolithographic processes, allowing the fabrication of arrays on a single wafer in parallel.

Method for making antenna array

A phase shifter comprising an actuator coupled to a dielectric. When the dielectric is inserted into the waveguide in response to actuation by the actuator, the phase velocity of the incoming electromagnetic wave is decreased, resulting in a phase shift of the electromagnetic wave. A desired phase shift and a low insertion loss can be controlled by positioning of the dielectric and engineering the permittivity of the dielectric.

Low loss microelectromechanical system (MEMS) phase shifter

A modulated MTS antenna including a metasurface fabricated from metallized cylinders on a ground plane. The antenna structure can be designed to operate in the Gigahertz or Terahertz frequency band and to have a well defined directivity. The MTS antenna may be micromachined out of a silicon wafer using deep reactive ion etching (DRIE).

Low-profile and high-gain modulated metasurface antennas from gigahertz to terahertz range frequencies

A silicon alignment pin is used to align successive layer of component made in semiconductor chips and/or metallic components to make easier the assembly of devices having a layered structure. The pin is made as a compressible structure which can be squeezed to reduce its outer diameter, have one end fit into a corresponding alignment pocket or cavity defined in a layer of material to be assembled into a layered structure, and then allowed to expand to produce an interference fit with the cavity. The other end can then be inserted into a corresponding cavity defined in a surface of a second layer of material that mates with the first layer. The two layers are in registry when the pin is mated to both. Multiple layers can be assembled to create a multilayer structure. Examples of such devices are presented.

Wafer-to-wafer alignment method

A solid state device chip including diodes (generating a higher frequency output through frequency multiplication of the input frequency) and a novel on-chip power combining design. Together with the on-chip power combining, the chip has increased efficiency because the diodes' anodes, being micro-fabricated simultaneously on the same patch of a GaAs wafer under identical conditions, are very well balanced. The diodes' GaAs heterostructure and the overall chip geometry are designed to be optimized for high power operation. As a result of all these features, the device can generate record-setting power having a signal frequency in the F-band and W-band (30% conversion efficiency).

High power W-band/F-band Schottky diode based frequency multipliers

A multi-pixel terahertz transceiver is constructed using a stack of semiconductor layers that communicate using vias defined within the semiconductor layers. By using a stack of semiconductor layers, the various electrical functions of each layer can be tested easily without having to assemble the entire transceiver. In addition, the design allows the production of a transceiver having pixels set 10 mm apart.

340 GHz multipixel transceiver

A silicon alignment pin is used to align successive layers of components made in semiconductor chips and/or metallic components to make easier the assembly of devices having a layered structure. The pin is made as a compressible structure which can be squeezed to reduce its outer diameter, have one end fit into a corresponding alignment pocket or cavity defined in a layer of material to be assembled into a layered structure, and then allowed to expand to produce an interference fit with the cavity. The other end can then be inserted into a corresponding cavity defined in a surface of a second layer of material that mates with the first layer. The two layers are in registry when the pin is mated to both. Multiple layers can be assembled to create a multilayer structure. Examples of such devices are presented.

Silicon alignment pins: an easy way to realize a wafer-to-wafer alignment

A system, method, device, and apparatus provide a dielectric waveguide splitter/bi-directional link. A dielectric substrate fabricated into a first Y-junction waveguide with a first port splitting into a first branch leading to a second port and a second branch leading to a third port. An angle between the first branch and the second branch is below ninety degrees (90&#xb0;). The dielectric waveguide splitter enables millimeter-wave (mmWave) transmission between the first port and the second port while reducing feedback of the mmWave between the second and third port. Two Y-junction waveguides may be fabricated back-to-back to provide simultaneous bidirectional mmWave transmission at a single frequency.

Dielectric waveguides splitter and hybrid/isolator for bidirectional link

A lens for interconnecting a metallic waveguide with a dielectric waveguide is provided. The lens may be coupled a metallic waveguide and a dielectric waveguide, and minimize a signal loss between the metallic waveguide and the dielectric waveguide.

Interconnect between a waveguide and a dielectric waveguide comprising an impedance matched dielectric lens

A multi-step silicon etching process has been developed to fabricate silicon-based terahertz (THz) waveguide components. This technique provides precise dimensional control across multiple etch depths with batch processing capabilities. Nonlinear and passive components such as mixers and multipliers waveguides, hybrids, OMTs and twists have been fabricated and integrated into a small silicon package. This fabrication technique enables a wafer-stacking architecture to provide ultra-compact multi-pixel receiver front-ends in the THz range.

Multi-step deep reactive ion etching fabrication process for silicon-based terahertz components

A novel MMIC on-chip power-combined frequency multiplier device and a method of fabricating the same, comprising two or more multiplying structures integrated on a single chip, wherein each of the integrated multiplying structures are electrically identical and each of the multiplying structures include one input antenna (E-probe) for receiving an input signal in the millimeter-wave, submillimeter-wave or terahertz frequency range inputted on the chip, a stripline based input matching network electrically connecting the input antennas to two or more Schottky diodes in a balanced configuration, two or more Schottky diodes that are used as nonlinear semiconductor devices to generate harmonics out of the input signal and produce the multiplied output signal, stripline based output matching networks for transmitting the output signal from the Schottky diodes to an output antenna, and an output antenna (E-probe) for transmitting the output signal off the chip into the output waveguide transmission line.

On-chip power-combining for high-power schottky diode based frequency multipliers

An antenna element suitable for integrated arrays at terahertz frequencies is disclosed. The antenna element comprises an extended spherical (e.g. hemispherical) semiconductor lens, e.g. silicon, antenna fed by a leaky wave waveguide feed. The extended spherical lens comprises a substantially spherical lens adjacent a substantially planar lens extension. A couple of TE/TM leaky wave modes are excited in a resonant cavity formed between a ground plane and the substantially planar lens extension by a waveguide block coupled to the ground plane. Due to these modes, the primary feed radiates inside the lens with a directive pattern that illuminates a small sector of the lens. The antenna structure is compatible with known semiconductor fabrication technology and enables production of large format imaging arrays.

Dielectric covered planar antennas

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Pasadena, CA, United States of America

Goutam Chattopadhyay