Sumco Corporation

Sumco Techxiv Corporation

Gou Uesono

Tadashi Kawashima

Naoya Nonaka

Masayuki Shinagawa

An epitaxial silicon wafer includes a silicon wafer added with phosphorus so that resistivity of the silicon wafer falls at or below 0.9 m&#x3a9;&#xb7;cm, an epitaxial film formed on a first side of the silicon wafer, and an oxidation film formed on a second side of the silicon wafer opposite to the first side, wherein an average number of Light Point Defect of a size of 90 nm or more observed on a surface of the epitaxial film is one or less per square centimeter.

Epitaxial silicon wafer having reduced stacking faults

A method includes: a backside-oxidation-film-formation step in which an oxidation film is formed on a backside of a silicon wafer; a backside-oxidation-film-removal step in which the oxidation film provided at an outer periphery of the silicon wafer is removed; an argon-annealing step in which the silicon wafer after the backside-oxidation-film-removal step is subjected to a heat treatment in an argon gas atmosphere at a temperature in a range from 1200 to 1220 degrees C. for 60 minutes or more and 120 minutes or less; and an epitaxial-film-formation step in which an epitaxial film is formed on a surface of the silicon wafer after the argon-annealing step.

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Nagasaki, Japan

Gou Uesono