Hitachi, Ltd.

Hitachi Microcomputer Engineering, Ltd.

Goro Suzuki

Nobuhiro Hamada

Tetsuya Yamamoto

Jun Ozawa

Masahiro Iwamura

Tsuyoshi Takahashi

Ko Miyazaki

Katsuji Shindo

Susumu Sugawara

Mikihiko Motoki

Yoshio Okamura

Takeuchi Shigetaka

Susumu Tamura

An LSI layout design method is for placing on a chip a plurality of different master cells, each of which has a plurality of signal wiring conductors not connected to internal elements, for example, transistors, resistors and so on for realizing a certain logic function.

Semiconductor integrated circuit and method and system for designing

A graphic processor comprises an input device for inputting a command from an operator, a display device for displaying graphic data and a computer for preparing and correcting graphic data by a command input from the operator and for making display control of the display device. When the operator wants to know the content of the command that is executed, he instructs the command to the computer. A command name, a processing content and a figure as an object of processing are calculated from history data instructed from the computer. The figure as the object of processing, the command processing content and the relation of correspondence are symbolized and displayed on the display device. Furthermore, a parametric figure is also displayed visually on the display device.

Graphic display apparatus

An apparatus and method for processing information of a drawing comprises steps of defining figure data representing figures, respectively, included in a drawing, preparing a plurality of regions called as field block memory regions for storing the figure data so that they can be selectively read out for edition of a drawing later on, and determining a usable range in each of the field block memories in accordance with the number of the figures included in the drawing. In a preferred mode, the method further includes steps of dividing the drawing into congruent rectangles called as buckets in a number determined in accordance with the number of the figures included in the drawing, allocating the abovementioned field block memory regions to the buckets, respectively, and storing the figure data in the memory region allocated to the bucket to which the associated figure belongs.

Drawing information processing method and apparatus

A grounding tank type arrester comprises a plurality of columns sorted into current folding columns and current pass columns. Each current folding column includes a plurality of stack sets of an element unit, having a plurality of zinc oxide elements, and an insulating spacer and the plural stack sets are stacked in regular sequence so that one element unit and one insulating spacer are stacked alternately. Each current pass column includes a plurality of stack sets of a zinc oxide element and an insulating spacer and the plural stack sets are stacked in regular sequence so that one zinc oxide element and one insulating spacer are stacked alternately. Individual zinc oxide elements on one level of individual current folding columns and individual zinc oxide elements on the one level of individual current pass columns are interconnected together by bridge conductor plates. The direction of current flowing through bridge conductor plates for connecting together zinc oxide elements on the one level of the current folding columns and current pass columns is inverse to the direction of current flowing through bridge conductor plates for connecting together zinc oxide elements on the neighboring level of the current folding columns and current pass columns and hence the residual inductance of the arrester can be reduced.

Grounding tank type arrester

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Hitachi, Japan

Goro Suzuki