Renesas Electronics Corporation

Renesas Technology Corp.

Synaptics Corporation

Synaptics Japan Gk

Synaptics Display Devices Gk

Renesas Sp Drivers Inc.

Goro Sakamaki

Yuri Azuma

Kei Tanabe

Yasuyuki Kudo

Shigeru Ohta

Naoki Takada

Akihito Akai

Yoshiki Kurokawa

Takashi Ohyama

Atsushi Maruyama

Yasuhito Kurokawa

Toshifumi Ogata

Shin Morita

Takatoshi Uchida

Yoshikazu Yokota

Yukari Katayama

Toshikazu Tachibana

Kunihiko Tani

Hiroki Awakura

Kazuya Endo

Kei Miyazawa

Takashi Nose

Hirobumi Furihata

Petr Shepelev

Tatsuya Ishii

Takesada Akiba

Erik Jonathon Thompson

Tomoo Minaki

Yasushi Kawase

Kota Kitamura

Akihisa Aoyama

Kazuhiko Kanda

Yoshitaka Iwasaki

Yosuke Okairi

Ki-hwak Yun

Michitoshi Honma

Goki Toshima

A display driver includes interface circuitry, image processing circuitry, and drive circuitry. The interface circuitry is configured to receive a full frame image and a foveal image from a source external to the display driver. The image processing circuitry is configured to: upscale the full frame image; render a foveated image from the upscaled full frame image and the foveal image. The foveated image includes a foveal area based on the foveal image, a peripheral are based on the upscaled full frame image, and a border area based on the foveal image and the upscaled full frame image. The border area being located between the foveal area and the peripheral area. The drive circuitry is configured to drive a display panel using the foveated image.

Device and method for foveated rendering

A display panel includes a plastic substrate and a first inner lead bonding (ILB) electrode on the plastic substrate. The first ILB electrode includes a first bonding segment, a second bonding segment, and a first connection segment. The first bonding segment is extended in a first direction oblique to a vertical direction of the display panel. The first connection segment is configured to provide an electrical connection between the first bonding segment and the second bonding segment. The first ILB electrode is configured to be bonded to an integrated circuit chip using one of the first bonding segment or the second bonding segment.

Technologies for mounting display driver integrated circuit chips on display panels

A display panel includes a plastic substrate and a first inner lead bonding (ILB) electrode on the plastic substrate. The first ILB electrode includes a first bonding segment, a second bonding segment, and a first connection segment. The first bonding segment is extended in a first direction oblique to a vertical direction of the display panel. The first connection segment is configured to provide an electrical connection between the first bonding segment and the second bonding segment. The first bonding segment is configured to be bonded to a first display driver integrated circuit (DDIC) chip, and the second bonding segment is configured to be bonded to a second DDIC chip configured differently from the first DDIC chip.

A display driver includes internal oscillator circuitry, timing controller circuitry, and panel interface circuitry. The internal oscillator circuitry is disposed internal to the display driver and configured to generate an internal oscillation signal. The timing controller circuitry is configured to generate a resultant sync signal using an external sync input received from an entity external to the display driver during a first period of a frame period. The timing controller circuitry is further configured to generate the resultant sync signal using the internal oscillation signal during a second period of the frame period, the second period following the first period. The panel interface circuitry is configured to generate, based on the resultant sync signal, an emission control signal that controls emission scan driver circuitry configured to drive a plurality of emission scan lines of a display panel.

Device and method for controlling a display panel

A semiconductor device comprises circuitry and a timing generator. The circuitry is configured to generate an emission control signal that controls light emission of pixels of a display panel such that a first vertical sync period comprises a plurality of control cycles for the light emission of the pixels. The timing generator is configured to, when a length of the first vertical sync period is changed, start a next vertical sync period following the first vertical sync period at timing based on a length of the control cycles.

Semiconductor device and method for driving a display panel

An example method of illuminating an optical fingerprint sensor integrated with a display, where the display includes a fingerprint (FP) pixel region and an outer pixel region exclusive of the FP pixel region, is described. The method includes: processing image data in display driver circuitry configured to drive the display to present an image; adjusting a first brightness setting, during the processing of the image data, corresponding to both the FP pixel region and the outer pixel region to provide illumination for the optical fingerprint sensor; and adjusting a second brightness setting, during the processing of the image data, corresponding to only the outer pixel region.

Optical fingerprint sensor illumination using a display

Provided is a display driver which can be used in common in any of COF mounting and COG mounting. In the display driver, a position (or write/output position) of display data output by an output circuit can be changed along a direction of an array of external output terminals Sto Saccording to mode data, whereby an array of external output terminals to use for output can be selected from more than one kind of arrays different in layout pitch. Therefore, the display driver can be used in display panels with signals lines having different pitches serving to receive drive signals from the display driver and in addition, used in common in any of COF mounting and COG mounting which are different from each other in the pitch of mounting wiring lines.

Display driver and display panel module

The present invention is to provide a semiconductor device that can correctly switch endians on the outside even if the endian of a parallel interface is not recognized on the outside. The semiconductor device includes a switching circuit and a first register. The switching circuit switches between whether a parallel interface with the outside is to be used as a big endian or a little endian. A first register holds control data of the switching circuit. The switching circuit regards the parallel interface as the little endian when first predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register, and regards the parallel interface as the big endian when second predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register. Whatever the endian setting status, the control information can be correctly inputted without being influenced by the endian setting status.

Semiconductor device and data processing system selectively operating as one of a big endian or little endian system

In a display driver, a first backlight control unit using a histogram and a second backlight control unit using an optical sensor can be used in combination. The display driver includes a PWM generating unit setting a control signal value consisting of a product of a luminance rate of X % and a luminance rate of Y % as a luminance rate of a control signal for controlling a backlight with respect to maximum backlight luminance when a luminance rate of a control signal obtained by first backlight control with respect to the maximum backlight luminance is X % and a luminance rate of a control signal obtained by second backlight control with respect to the maximum backlight luminance is Y %.

Display driver

The display control device has a register for holding mode data for giving: a direction about which of a first display mode for performing display control of display data supplied together with a display timing signal from outside, and a second display mode for performing display control of display data written in RAM without accepting supply of a display timing signal from outside to select; and a direction about whether or not to select a scale-up mode for scaling up the display data, so that the mode data can be rewritten from the outside. The display mode is controlled based on the setting values on the register. The control register can be rewritten according to the type of data to be displayed, the system working situation, user settings, etc. Therefore, the low power consumption allowable in terms of system, and a required display performance can be obtained timely and readily.

Display control device and data processing system

A display control device and technique for controlling displays on a display unit, in which a plurality of display segments are two-dimensionally arranged (e.g. a dot matrix type display unit), is provided. The technique is effectively applicable to a write data latch circuit of a memory for storing display data in the display control device, such as, for example, a liquid crystal display control device, a mobile electronic apparatus, etc. A display drive control technique for controlling a moving picture display mode of a display device is also provided. The display drive control circuit controls a picture display mode of a display device for displaying still pictures and moving pictures to a liquid crystal display device, such as, for example, a dot matrix type display devices, an organic EL display device, etc.

Display control device and mobile electronic apparatus

A display device includes a boosting power supply circuit, a logic circuit and a charge transport path. The boosting power supply circuit generates a boosted power supply voltage by boosting an analog power supply voltage. The logic circuit is responsive to a decrease in a voltage level on at least one of power supply lines to which analog and logic power supply voltages are supplied for controlling a source line drive circuitry and a gate line drive circuitry to discharge charges accumulated in the display panel. The charge transport path is configured to transport charges from a power supply line on which the boosted power supply voltage is generated to a power supply line which supplies an internal logic power supply voltage to the logic circuit in response to the decrease in the voltage level on the at least one of the first and second power supply lines.

Mobile terminal and display panel driver

Growing community of inventors

Tokyo, Japan

Goro Sakamaki