Toshiba Memory Corporation

Kioxia Corporation

Dell Products Inc.

Toshiba Corporation

Gordon W Waidhofer

Christopher Delaney

Leland Thompson

Ali Aiouaz

John Hamilton

Methods and systems for generating backups are disclosed. To generate a backup, a snapshot may be generated. A snapshot may be a point in time representation of data, in contrast to live data which may be updated over time. To reduce the impact of snapshot generation, a method, system, and device for generating and maintaining a snapshot that utilizes fewer writes is disclosed. To reduce the writes, the snapshots may be generated by preferentially referring to already stored copies of data for the snapshot rather than storing an additional copy of data for the snapshot. The snapshots may be maintained by storing copies of data for the snapshot only when live data diverges from the snapshot.

System and method to conserve device lifetime for snapshot generation

A method and a computer readable medium comprising instructions for upgrading a firmware of a peripheral device connected to a host device via a Peripheral Component Interconnect Express (PCIe) bus from the operating system (OS) of the host device is disclosed. In one embodiment, the method and computer readable medium instructions includes halting host device access to the peripheral device after detecting the peripheral device has completed a shutdown sequence, and resetting the peripheral device after a predetermined time period after completion of the shutdown sequence. The method and computer readable medium instructions further includes initializing the firmware stored in a persistent storage location of the peripheral device, and re-establishing a connection between the peripheral device and the host device. In one embodiment, the predetermined time period is greater than a time it takes for the host device to detect the peripheral device has completed the shutdown sequence. In one embodiment, the peripheral device is a Non-Volatile Memory Express (NVMe)-compliant data storage device.

Host-safe firmware upgrade of a PCI express device

In one embodiment, a solid state drive (SSD) with power loss protection (PLP) includes a SSD controller, a secondary controller and a power circuit configured to supply power to the SSD from a power source during normal operation and backup power from a backup power source in response to a loss of power supplied by the power source. In the event of a loss of power, the secondary controller is configured to track the holdup time, or duration of time for which the primary controller can operate on backup power. In one embodiment, the holdup time tracked by the secondary controller is stored in a non-volatile memory in communication with the secondary controller.

Holdup time measurement for solid state drives

A method of updating a file in a solid state drive (SSD) and an SSD configured to update a file in the SSD is disclosed. In one embodiment, the method includes performing one or more writes to a holding file in an auxiliary memory, the one or more writes corresponding to an update for a target file in the auxiliary memory. The method further includes applying the update to the target file in the auxiliary memory when each of the one or more writes has been successfully written to the holding file, and resetting the holding file when less than all of the one or more writes have been successfully written to the holding file. In one embodiment, a flash controller in communication with the auxiliary memory performs the update.

Solid state drive with holding file for atomic updates

A solid state drive includes a dual buffer for buffering incoming write data prior to committal to a non-volatile memory. The buffer is operated to provide a temporary backup of dirty data pending successful completion of a host transfer. The dual buffer may be operated as a primary buffer and a secondary buffer. The primary buffer may be used as the default buffer during normal operation. The secondary buffer is written to during a host transfer that is a cache write to dirty data. A copying process may be used to copy data between the primary and the secondary buffer to preserve the backup data pending successful completion of the host transfer.

Dual buffer solid state drive

On-chip instruction RAM is leveraged as an extension of on-chip data RAM during normal use of a modified Harvard Architecture processor. Unused space in an instruction RAM is detected in a modified Harvard Architecture processor. During operation of the processor this unused space is used to load and store data normally loaded and stored in an on-chip data RAM. A performance penalty associated with swapping out to external memory is reduced. The type of data stored in the unused portion of the instruction RAM may be selected to optimize performance. In one implementation, the unused space in the instruction RAM is used to load and store only a single type of data, such as heap, stack, initialized or uninitialized data.

Leveraging instruction RAM as a data RAM extension during use of a modified Harvard architecture processor

A solid state drive has a power failure savings mode that permits a reduction in holdup time for a temporary backup power supply. The solid state drive stores data in a multi-level cell (MLC) mode. In a power fail saving mode system metadata is written in a pseudo Single Level Cell (pSLC) mode. In the normal operating mode page writes are performed in complete blocks. In the power fail save saving mode data from a write buffer is written and additional dummy pages written to reduce the total number of pages that must be written to below a complete block size with the dummy pages providing protection from data corruption.

Growing community of inventors

Irvine, CA, United States of America

Gordon W Waidhofer