Intel Corporation

Gordon McFadden

Bret L Toll

Vedvyas Shanbhogue

Rahul Khanna

Willard M Wiseman

Bruce Querbach

Amy L Santoni

Deep K Buch

Christopher Connor

Kameswar Subramaniam

Eric Rasmussen

Embodiments detailed herein include an apparatus that includes a reliability assessment engine (RAE) stored in non-volatile memory and processing circuitry to execute the RAE to: receive data of at least one physical condition from a plurality of intra-die variation monitoring circuits, apply the received data least one to at least one reliability physics model, and calculate at least one of an estimated amount of lifetime consumed and an estimated amount of lifetime remaining.

Integrated circuit reliability assessment apparatus and method

In an embodiment, a processor includes at least one core, a power management unit having a first test register including a first field to store a test patch identifier associated with a test patch and a second field to store a test mode indicator to request a core functionality test, and a microcode storage to store microcode to be executed by the at least one core. Responsive to the test patch identifier, the microcode may access a firmware interface table and obtain the test patch from a non-volatile storage according to an address obtained from the firmware interface table. Other embodiments are described and claimed.

Providing autonomous self-testing of a processor

Growing community of inventors

Hillsboro, OR, United States of America

Gordon McFadden