Zenith Data Systems Corporation

Gordon L Helm

Mark D Nicol

Anthony M Olson

Todd R Witkowski

William J McAuliffe

A memory system includes a memory unit with plural addressable storage locations, a connector arrangement for detachably electrically coupling the memory unit to a computer, and a decoding arrangement for determining whether a computer memory address is within a range of addresses to which the memory unit is to respond, the decoding arrangement including a base address register storing a value representing the first address in the range and a size register defining the number of addresses in the range. A method by which a computer can automatically configure this system includes the steps of determining a base address to be associated with the connector, loading into the base address register a value representing the base address, loading into the size register a value representing the maximum range of addresses, thereafter selectively accessing storage locations to determine the actual number of contiguous locations in the memory unit, and then changing the size register, when the actual number of locations is less than the maximum range of addresses, to a value representing the actual number of locations.

Method and apparatus for automatic memory configuration by a computer

A computer system reads data from selected locations in a memory while each address applied to the memory is temporarily stored in a register. If a data error is detected, two flipflops are set, one of which can generate and interrupt the central processing unit, and the other of which disables an AND gate through which a load signal is applied to the register in order to disable the register. An arrangement for resetting the second flipflop includes a third flipflop which is set and reset respectively at the beginning and end of each input/output cycle and which has an output coupled to one input of an AND gate having a further input to which is applied a signal selectively actuable by the central processing unit, the output of the AND gate and a system reset signal being applied to inputs of an OR gate which has its output connected to a reset input of the second flipflop.

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St. Joseph, MI, United States of America

Gordon L Helm