Telefonaktiebolaget Lm Ericsson (publ)

Csr Technology Inc.

Mitel Semiconductor Limited

Zoran Corporation

Gordon A Wilson

Ulf Mattsson

Rolf Sundblad

Graham R Leach

A PLL circuit () for generating a pixel-clock signal based on a hsync signal. The PLL circuit comprises a phase-frequency detector arranged to receive the hsync signal and a frequency divided pixel-clock signal, and generate up and down signals based on the hsync signal and the frequency-divided pixel-clock signal. A charge pump () is arranged to generate an output signal based on the up and down signals and a loop filter () is arranged to generate a frequency-control signal based on the output signal of the charge pump (). Furthermore, a VCO () is arranged to generate an oscillating signal and adjust the frequency of the oscillating signal in response to the frequency-control signal. The VCO () is adapted to have a tuning range with a center frequency which is larger than or equal to 4 GHz. A programmable first frequency divider () is arranged to generate the pixel-clock signal by frequency division of the oscillating signal, and a programmable second frequency divider () is arranged to generate the frequency divided pixel-clock signal by frequency division of the pixel-clock signal.

Phase-locked loop

An integrated circuit comprises a biasing circuit for maintaining the transconductance of a Gm cell constant. The integrated circuit comprises an on-chip constant voltage source and an on-chip constant current source. The on-chip constant current source has a connection for an external resistance, the value of the external resistance determining the current generated by the constant current source. The biasing circuit comprises means for providing a first fraction (&#x3b2;) of the current generated by the on-chip current source to bias the output of the Gm cell, and means for providing a second fraction (&#x3b1;) of the voltage generated by the on-chip voltage source to bias the input of the Gm cell. The transconductance of the Gm cell is controlled to be equal to the ratio of said fraction of the current generated by the on-chip current source to said fraction of the voltage generated by the on-chip voltage source.

Integrated circuit

In a detection circuit for ASK or OOK modulation, the received modulated signal is ac coupled to a dc restoration circuit and amplified. The dc restoration is carried out on signal peaks corresponding to &ldquo;mark&rdquo; intervals of the modulated signal. Thus data may be recovered even in the presence of high levels inband continuous interfering signals.

Growing community of inventors

Swindon, United Kingdom

Gordon A Wilson