Nortel Networks Corporation

Gord G Rabjohn

Somsack Sychaleun

Darcy Poulin

The present invention relates to a bias circuit for biasing a depletion mode power transistor. The bias circuit includes a voltage offset circuit and a transistor, where the voltage offset circuit is serially coupled between the gate terminal of the depletion mode power transistor and the drain terminal of the transistor. The bias circuit generates a bias voltage that, when applied to the gate terminal of the depletion mode power transistor, maintains a substantially constant drain current through the power transistor over a range of threshold voltages caused by process and temperature variations.

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Ottawa, Canada

Gord G Rabjohn