Cadence Design Systems, Inc.

National Semiconductor Corporation

Invarium, Inc.

National Semiconductor Corporated

Gokhan Percin

Abdurrahman Sezginer

Franz X Zach

Peter B Johnson

Jesus Orsely Carrero

Peter Smeys

Shahram Mostafazadeh

Chi-Song Horng

Steven J Adler

Hsu-Ting Huang

Bayram Yenikaya

Roy Varada Prasad

Ram S Ramanujam

Xuelong Cao

Tatung Chow

Kostyantyn Chuyeshov

A method for forming a capacitive micromachined ultrasonic transducer (CMUT) includes forming multiple CMUT elements in a first semiconductor-on-insulator (SOI) structure. Each CMUT element includes multiple CMUT cells. The first SOI structure includes a first handle wafer, a first buried layer, and a first active layer. The method also includes forming a membrane over the CMUT elements and forming electrical contacts through the first handle wafer and the first buried layer. The electrical contacts are in electrical connection with the CMUT elements. The membrane could be formed by bonding a second SOI structure to the first SOI structure, where the second SOI structure includes a second handle wafer, a second buried layer, and a second active layer. The second handle wafer and the second buried layer can be removed, and the membrane includes the second active layer.

Integration of structurally-stable isolated capacitive micromachined ultrasonic transducer (CMUT) array cells and array elements

The present invention provides a method for calibrating a computational model of a lithography process by calculating a demerit function using an intensity measurement at a location of a wafer; and calibrating the lithography model or a mask making model by determining values of parameters of the computational model using the calculated demerit function. The method may also use a second demerit function that is defined by the sum of squares of differences between a simulated and measured critical dimensions of a feature on the wafer.

System and method for calibrating a lithography model

A method for forming a capacitive micromachined ultrasonic transducer (CMUT) is provided that includes forming oxide features outwardly of a CMUT control chip in a silicon wafer. The oxide features are planarized. A silicon-on-insulator (SOI) wafer is bonded to the planarized oxide features. For a particular embodiment, the SOI wafer comprises a single crystal epitaxial layer, a buried oxide layer and a silicon layer, and the single crystal epitaxial layer is bonded to the planarized oxide features, after which the silicon layer and the buried oxide layer of the SOI wafer are removed, leaving the single crystal epitaxial layer bonded to the oxide layer.

Method and system for forming a capacitive micromachined ultrasonic transducer

A method for synthesizing a photomask data set from a given target layout, including the following steps: (a) providing a set of target polygons for the target layout; (b) fitting a smooth curve to a target polygon of the set of target polygons, the curve having a set of etch-target points; (c) moving the etch target points according to a model of an etch process to produce a set of lithography-target points; and (d) synthesizing a photomask data set based on a model of a lithography process and the set of lithography-target points.

Method of compensating photomask data for the effects of etch and lithography processes

First and second exposures of a mask onto a wafer are performed such that the exposure field of the second exposure partially overlaps the exposure field of the first exposure. A characteristic of a set of features is determined, and a value of a parameter of an optical proximity correction model is determined. An alignment feature can be used to align a measurement tool. In yet another embodiment, pupil intensity distribution of an imaging system is measured by exposing an image field of a radiation detector with a bright feature, positioning the detector at a distance away from the image plane, and exposing the image field of the detector with a bright feature, resulting in a cumulative exposure of the image field of the detector from the two exposures. A characteristic of a spatial pattern in the cumulative exposure of the image field of the detector is then determined.

Method and system for reducing the impact of across-wafer variations on critical dimension measurements

A method for generating an OPC model is provided which takes into consideration across-wafer variations which occur during the process of manufacturing semiconductor chips. More particularly, a method for generating an OPC model is provided which takes into consideration across-wafer variations which occur during the process of manufacturing semiconductor chips based on the parameters of test patterns measured at the 'wafer sweet spots' so as to arrive at an accurate model.

Calibration on wafer sweet spots

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Los Gatos, CA, United States of America

Gokhan Percin