Synopsys, Inc.

Gokhan Gultoprak

Jun Zhu

Marc Greenberg

Toshinao Matsumura

Systems and methods for address mapping for a memory system are described. A system address that includes a first set of bits may be received. The first set of bits may be partitioned into at least a second set of bits and a third set of bits. A fourth set of bits may be determined based on the second set of bits. A memory address may be determined by using the third set of bits and the fourth set of bits.

Address mapping for a memory system

Activation of portions of a memory is tracked to allow an affected portion of the memory to be refreshed before it is corrupted by multiple activations. An address for the accessed portion of memory, called the aggressor row, is compared to addresses stored in a content addressable memory (CAM). If the address is not already stored in the CAM, it is stored, casting out another address if necessary, and a count based on an Others value is stored in the CAM with the address. If the address is already stored in the CAM, its associated count is incremented. If a count associated with an address exceeds a threshold based on a maximum activation count, another portion of memory, such as a victim row of memory adjacent to the aggressor row of memory, is refreshed, and the count reset.

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Dublin, Ireland

Gokhan Gultoprak