Intel Corporation

Sanas.ai Inc.

Gokce Keskin

Oguz Hasan Elibol

Anil Thomas

Joydeep Ray

Elmoustapha Ould-Ahmed-Vall

Prasoonkumar Surti

Rajesh Poornachandran

Ben J Ashbaugh

Chandrasekaran Sakthivel

Jayaram Bobba

Kumar Balasubramanian

Jerin C Justin

Pradeep Ramani

Bhavani Subramanian

Rama Harihara

Jing Huang

Xiaoming Cui

Timothy B Costa

Ting Gong

Guozhong Zhuang

Hong Wang

Bryan K Casper

James E Jaussi

Tsung-Han Lin

Ganesh Balamurugan

Tawfiq Musah

Travis T Schluessler

Eriko Nurvitadhi

Gautham N Chinya

Tomer Bar-On

Devan Burke

Abhishek Venkatesh

Amit Bleiweiss

Perry H Wang

John G Gierach

Dhawal Srivastava

She-Hwa Yen

Shawn Zhang

Lukas Pfeifenberger

Stephen J Tarsa

Hsiang-Tsung Kung

Maxim Serebryakov

Alvaro Escudero

Piotr Dura

Ankita Jha

David Braude

Pruthvi Gowda Thorehosur Appajigowda

Nishant Patel

Huma Abidi

Jaikrishnan Menon

Jason Wu

Bajibabu Bollepalli

The disclosed technology relates to methods, voice enhancement systems, and non-transitory computer readable media for real-time voice enhancement. In some examples, input audio data including foreground speech content, non-content elements, and speech characteristics is fragmented into input speech frames. The input speech frames are converted to low-dimensional representations of the input speech frames. One or more of the fragmentation or the conversion is based on an application of a first trained neural network to the input audio data. The low-dimensional representations of the input speech frames omit one or more of the non-content elements. A second trained neural network is applied to the low-dimensional representations of the input speech frames to generate target speech frames. The target speech frames are combined to generate output audio data. The output audio data further includes one or more portions of the foreground speech content and one or more of the speech characteristics.

Methods for neural network-based voice enhancement and systems thereof

An apparatus to facilitate compute optimization is disclosed. The apparatus includes a at least one processor to perform operations to implement a neural network and compute logic to accelerate neural network computations.

Compute optimization mechanism for deep neural networks

Embodiments are generally directed to compression in machine learning and deep learning processing. An embodiment of an apparatus for compression of untyped data includes a graphical processing unit (GPU) including a data compression pipeline, the data compression pipeline including a data port coupled with one or more shader cores, wherein the data port is to allow transfer of untyped data without format conversion, and a 3D compression/decompression unit to provide for compression of untyped data to be stored to a memory subsystem and decompression of untyped data from the memory subsystem.

Compression of machine learning models utilizing pseudo-labeled data training

Dynamic assignment of down sampling intervals for data stream processing

An embodiment of a semiconductor package apparatus may include technology to process one or more vectors with a sum of squares operation with a layer of a multi-layer neural network, and determine a fixed-point approximation for the sum of squares operation. Other embodiments are disclosed and claimed.

Iterative normalization for machine learning applications

Policy-based system interface for a real-time autonomous system

Compression in machine learning and deep learning processing

Implementations of the disclosure provide a processing device comprising a branch predictor circuit to obtain a branch history for an application. The branch history comprising references to branching instructions associated with the application and an outcome of executing each branch. Using the branch history, a neutral network is trained to produce a weighted value for each branch of the branching instructions. Features of the branching instructions are identified based on the weighted values. Each feature identifying predictive information regarding the outcome of at least one branch of correlated branches having corresponding outcomes. A feature vector is determined based on the features. The feature vector comprises a plurality of data fields that identify an occurrence of a corresponding feature of the correlated branches with respect to the branch history. Using the feature vector, a data model is produced to determine a predicted outcome associated with the correlated branches.

Supporting learned branch predictors

A processor includes a front end to decode an instruction, an allocator to pass the instruction to a nearest neighbor logic unit (NNLU) to execute the instruction, and a retirement unit to retire the instruction. The NNLU includes logic to determine input of the instruction for which nearest neighbors will be calculated, transform the input, retrieve candidate atoms for which the nearest neighbors will be calculated, compute distance between the candidate atoms and the input, and determine the nearest neighbors for the input based upon the computed distance.

Instruction and logic for nearest neighbor unit

Some embodiments include apparatus and methods having an input to receive an input signal, additional inputs to receive clock signals having different phases to sample the input signal, and a decision feedback equalizer (DFE) having DFE slices. The DFE slices include a number of data comparators to provide data information based on the sampling of the input signal, and a number of phase error comparators to provide phase error information associated with the sampling of the input signal. The number of phase error comparators of the DFE slices is not greater than the number of data comparators of the DFE slices.

Wireline receiver circuitry having collaborative timing recovery

Growing community of inventors

Hillsboro, OR, United States of America

Gokce Keskin