Kabushiki Kaisha Toshiba

Goh Uemura

Atsushi Kunimatsu

Tsutomu Owa

Kenta Yasufuku

Masaki Miyagawa

Kenichi Nagai

Tsutomu Unesaki

According to one embodiment, an information processing device includes an OS and a virtual machine switching section. The OS accesses a hardware resource including a nonvolatile semiconductor memory and a semiconductor memory used as a cache memory of the nonvolatile semiconductor memory. The virtual machine switching section switches a virtual machine in exection from a first virtual machine to a second virtual machine while a cache process is executed, when cache miss in a process executed by the first virtual machine is detected.

Information processing device and information processing method

According to one embodiment, an information processing device includes a first determination section and a setting section. The first determination section determines inconsistency between first data and second data. The first data is stored in a nonvolatile semiconductor memory. The second data is corresponding to the first data and stored in a semiconductor memory. The setting section sets execution timing of write back based on access frequency information associated with the second data.

Variable write back timing to nonvolatile semiconductor memory

A processor system includes a plurality of first processors, a temperature sensor, a main memory, and a second processor. The first processors individually process tasks. The temperature sensor measures a temperature of each of the first processors. The main memory stores programs of the tasks processed by the first processors, and a task priority order table containing a relationship between the tasks and task priority numbers. The second processor assigns the tasks to the first processors on the basis of the task priority order table and the temperatures of the first processors measured by the temperature sensor.

Growing community of inventors

Kawasaki, Japan

Goh Uemura