Koninklijke Philips Corporation N.v.

Nxp B.v.

U.S. Philips Corporation

Koninklijke Phillips Electronics N.v.

Godefridus A M Hurkx

Rob Van Dalen

Jan Willem Slotboom

Adam R Brown

Wiebe B De Boer

Prabhat Agarwal

Hendrik G A Huizing

Holger Schligtenhorst

Tony Vanhoucke

Raymond J E Hueting

Christelle Rochefort

Bernd Sievers

Gerben Doornbos

Radu Surdeanu

Jan W Slotboom

Gilberto Curatola

Michael A A In'T Zandt

Hans M B Boeve

Eddie Huang

Karen Attenborough

Andrew M Warwick

Adam Brown

Michael S Peter

Erik P A M Bakkers

Raymond J Duffy

Philippe Meunier-Beillard

Erwin Hijzen

Michael A A In 'T Zandt

Melanie M H Wagemans

An electronic device comprising a generator for generating a stream of charge carriers. The generator comprises a bipolar transistor having an emitter region, a collector region and a base region oriented between the emitter region and the collector region, and a controller for controlling exposure of the bipolar transistor to a voltage in excess of its open base breakdown voltage (BV) such that the emitter region generates the stream of charge carriers from a first area being smaller than the emitter region surface area. The electronic device may further comprise a material arranged to receive the stream of charge carriers for triggering a change in a property of said material, the emitter region being arranged between the base region and the material.

Charge carrier stream generating electronic device and method

A control circuit for a transistor arrangement comprises a monitoring arrangement () for monitoring the current flow and voltage across the transistor arrangement () and means () for determining if the current and voltage values define an operating point which falls within a stable operating region. The stable operating region comprises a region having a boundary () which comprises an electro-thermal instability line.

Method and apparatus for maintaining circuit stability

A tunnel transistor includes source diffusion () of opposite conductivity type to a drain diffusion () so that a depletion layer is formed between source and drain diffusions in a lower doped region (). An insulated gate () controls the position and thickness of the depletion layer. The device includes a quantum well formed in accumulation layer () which is made of a different material to the lower layer () and cap layer ().

Tunnel field effect transistor

A metal-base transistor is suggested. The transistor comprises a first and a second electrode () and base electrode () to control current flow between the first and second electrode. The first electrode () is made from a semiconduction material. The base electrode () is a metal layer deposited on top of the semiconducting material forming the first electrode. According the invention the second electrode is formed by a semiconducting nanowire () being in electrical contact with the base electrode ().

Metal-base nanowire transistor

A thermally programmable memory has a programmable element () of a thermally programmable resistance preferably of phase change material, material and a blown antifuse () located adjacent to the programmable material. Such a blown antifuse has a dielectric layer () surrounded by conductive layers () to enable a brief high voltage to be applied across the dielectric to blow a small hole in the dielectric during manufacture to form a small conductive path which can be used as a tiny electrical heater for programming the material. Due to the current confinement by the hole, the volume of the material that must be heated in order to switch to a highly-resistive state is very small. As a result the programming power can be low.

Dielectric antifuse for electro-thermally programmable device

A semiconductor device includes a preferably discrete bipolar transistor with a collector region, a base region, and an emitter region which are provided with connection conductors. A known means of preventing a saturation of the transistor is that the latter is provided with a Schottky clamping diode. The latter is formed in that case in that the connection conductor of the base region is also put into contact with the collector region. Here, the second connection conductor is exclusively connected to the base region, and a partial region of that portion of the base region which lies outside the emitter region, as seen in projection, lying below the second connection conductor is given a smaller flux of dopant atoms. The bipolar transistor is provided with a pn clamping diode which is formed between the partial region and the collector region.

Semiconductor device with a bipolar transistor, and method of manufacturing such a device

A semiconductor device, such as a power MOSFET, Schottky rectifier or p-n rectifier, has a voltage-sustaining zone ( ) between a first ( ) and second ( ) device regions adjacent to respective first and second opposite surfaces ( ) of a semiconductor body . Trenched field-shaping regions ( ) including a resistive path ( ) extend through the voltage-sustaining zone ( ) to the underlying second region ( ), so as to enhance the breakdown voltage of the device. The voltage-sustaining zone ( ) and the trenched field-shaping regions ( ) are present in both the active device area (A) and in the peripheral area (P) of the device. A further resistive path ( ) extends across the first surface ( ), outwardly over the peripheral area (P). This further resistive path ( ) provides a potential divider that is connected to the respective resistive paths ( ) of successive underlying trenched field-shaping regions ( ) in the peripheral area (P). Thereby a gradual variation is achieved in the potential (V ) applied by the successive trenched field-shaping regions ( ) in the peripheral area (P) of the voltage-sustaining zone ( ). This advantageous peripheral termination reduces device susceptibility to deviations in the field profile in this peripheral area (P).

Semiconductor devices and their peripheral termination

A semiconductor body has first and second opposed major surfaces. A first region meets the first major surface and at least one second region meets the second major surface. The semiconductor body provides a voltage-sustaining zone between the first and second regions. The voltage sustaining zone has third regions of one conductivity type interposed with fourth regions of the opposite conductivity type with the second and third regions providing a rectifying junction such that, in use, when the rectifying junction is forward biased in one mode of operation by a voltage applied between the first and second regions, a main current path is provided between the first and second major surfaces through the first region, the voltage-sustaining zone and the second region.

Semiconductor device with voltage sustaining zone

A semiconductor device, such as a MOSFET or PN diode rectifier, has a p-n junction ( ) between a first device region ( ) and an underlying voltage-sustaining zone ( ). Trenched field-shaping regions ( ) extend through the voltage-sustaining zone ( ) to improve the voltage-blocking and on-resistance characteristics of the device. The trenched field-shaping region ( ) comprises a resistive path ( ) accommodated in a trench ( ) that has an insulating layer ( ) at its side-walls. The insulating layer ( ) dielectrically couples potential from the resistive path ( ) to the voltage-sustaining zone ( ) that is depleted in a voltage-blocking mode of operation of the device. The insulating layer ( ) extends at the side-walls of the trench ( ) to an upper level ( ) that is higher than a lower level ( ) at which the resistive path ( ) starts in the trench ( ). This lower level ( ) is more closely aligned to the p-n junction ( ) and is protected by the insulating layer ( ) extending to the higher level ( ). This construction enables the electric field distribution in the voltage-sustaining zone ( ) to be improved by aligning very closely the start of the potential drop along the resistive path ( ) with the p-n junction depth (d).

Trench semiconductor devices

In a trench-gate semiconductor device, for example a cellular power MOSFET, the gate ( ) is present in a trench ( ) that extends through the channel-accommodating region ( ) of the device. An underlying body portion ( ) that carries a high voltage in an off state of the device is present adjacent to a side wall of a lower part ( ) of the trench ( ). Instead of being a single high-resistivity region, this body portion ( ) comprises first regions ( ) of a first conductivity type interposed with second regions ( ) of the opposite second conductivity type. In the conducting state of the device, the first regions ( ) provide parallel current paths through the thick body portion ( ), from the conduction channel ( ) in the channel-accommodating region ( ). In an off-state of the device, the body portion ( ) carries a depletion layer ( ). The first region ( ) of this body portion ( ) is present between the second region ( ) and the side wall ( ) of the lower part ( ) of the trench ( ) and has a doping concentration (Nd) of the first conductivity type that is higher than the doping concentration (Na) of the second conductivity type of the second region ( ). A balanced space charge is nonetheless obtained by depletion of the first and second regions ( ), because the width (W ) of the first region ( ) is made smaller than the width (W ) of the lower-doped second region ( ). This device structure can have a low on-resistance and high breakdown voltage, while also permitting its commercial manufacture using dopant out-diffusion from the lower trench part ( ) into the lower-doped second region ( ) to form the first region ( ).

Trench-gate semiconductor devices and their manufacture

A semiconductor body ( ) has first and second opposed major surfaces ( and ), with a first region ( ) of one conductivity type and a plurality of body regions ( ) of the opposite conductivity type each forming a pn junction with the first region ( ). A plurality of source regions ( ) meet the first major surface ( ) and are each associated with a corresponding body region ( ) such that a conduction channel accommodating portion (33 ) is defined between each source region ( ) and the corresponding body region ( ). An insulated gate structure ( ) adjoins each conduction channel area ( ) for controlling formation of a conduction channel in the conduction channel areas to control majority charge carrier flow from the source regions ( ) through the first region ( ) to a further region ( ) adjoining the second major surface ( ). A plurality of field shaping regions ( ) are dispersed within the first region ( ) and extend from the source regions ( ) towards the further region ( ) such that, in use, a voltage is applied between the source and further regions ( and ) and the device is non-conducting, the field shaping regions ( ) provide a path for charge carriers from the source regions at least partially through the first region and cause a depletion region in the first region ( ) to extend through the first region ( ) towards the further region ( ) to increase the reverse breakdown voltage of the device.

Insulated gate field effect device

The invention relates to a so-called punch-through diode with a mesa ( ) comprising, in succession, a first ( ), a second ( ) and a third ( ) semiconductor region ( ) of, respectively, a first, a second and the first conductivity type, which punch-through diode is provided with two connection conductors ( ). During operation of said diode, a voltage is applied such that the second semiconductor region ( ) is fully depleted. A drawback of the known punch-through diode resides in that the current flow is too large at lower voltages. In a punch-through diode according to the invention, a part ( A, B) of the second semiconductor region ( ), which, viewed in projection, borders on the edge of the mesa ( ), is provided with a larger flux of doping atoms of the second conductivity type than the remainder ( A) of the second semiconductor region ( ). It has been found that the high current at a low voltage of the known diode is caused by the fact that the second semiconductor region ( ) at the edge of the mesa ( ) is depleted before the remainder of the second semiconductor region ( ). By locally increasing the flux of doping atoms, the depletion at the edge is delayed as compared to the remainder of the second semiconductor region. Preferably, this result is obtained by locally increasing the thickness of the second semiconductor region ( ). In this manner, a substantial current reduction at lower voltages is obtained in the diode in accordance with the invention.

Enhanced flux semiconductor device with mesa and method of manufacturing same

A semiconductor device with a tunnel diode comprises two mutually adjoining semiconductor regions ( ) of opposed conductivity types having high enough doping concentrations to provide a tunneling junction. Portions ( A, A) of the semiconductor regions adjoining the junction comprise a mixed crystal of silicon and germanium. The doping concentration of both phosphorus and boron are substantially increased, given the same amount of dopants being offered as during the formation of the remainder of the regions. The tunneling efficiency is substantially improved, and also because of the reduced bandgap of said portions ( A, A). A much steeper current-voltage characteristic both in the forward and in the reverse direction is achieved. Thus, the tunneling pn junction can be used as a transition between two conventional diodes which are stacked one on the other and formed in a single epitaxial growing process. The doping concentration may be 6&times;10 or even more than 10 at/cm . A simple method of manufacturing such a device is preferably done at a temperature between 550&deg; C. and 800&deg; C.

Method of manufacturing semiconductor device with a tunnel diode

A semiconductor device has first and second opposed major surfaces ( and ). A semiconductor first region ( ) is provided between second ( or ) and third ( ) regions such that the second region ( or ) forms a rectifying junction ( or ) with the first region ( ) and separates the first region ( ) from the first major surface ( ) while the third region ( ) separates the first region ( ) from the second major surface ( ). A plurality of semi-insulating or resistive paths ( ) are dispersed within the first region ( &prime;) such that each path extends through the first region from the second to the third region. In use of the device when a reverse biasing voltage is applied across the rectifying junction ( or ) an electrical potential distribution is generated along the resistive paths ( ) which causes a depletion region in the first region ( ) to extend through the first region ( ) to the third region ( ) to increase the reverse breakdown voltage of the device. The device may be, for example a pn-n diode in which case the second region is a semiconductive region of the opposite conductivity type to the first region or a Schottky diode in which case the second region ( ) forms a Schottky contact with the first region.

Semiconductor device having a plurality of resistive paths

The invention relates to a semiconductor device having a rectifying junction ( ) which is situated between two (semiconductor) regions ( ) of an opposite conductivity type. The second region ( ), which includes silicon, is thicker and has a smaller doping concentration than the first region ( ) which includes a sub-region comprising a mixed crystal of silicon and germanium. The two regions ( ) are each provided with a connection conductor ( ). Such a device can very suitably be used as a switching element, in particular as a switching element for a high voltage and/or high power. In the known device, the silicon-germanium mixed crystal is relaxed, leading to the formation of misfit dislocations. These serve to reduce the service life of the minority charge carriers, thus enabling the device to be switched very rapidly. In a device in accordance with the invention, the entire first region ( ) comprises a mixed crystal of silicon and germanium, and the germanium content and the thickness of the first region ( ) are selected so that the voltage built up in the semiconductor device remains below the level at which misfit dislocations develop. Surprisingly, it has been found that such a device can also be switched very rapidly, even more rapidly than the known device. The absence of misfit dislocations has an additional advantage, namely that the device is very reliable. Misfit dislocations do not develop if the product of said relative deviation in the lattice constant and the thickness of the first region is smaller than or equal to 40 nm %. A safe upper limit for said product is 30 nm %.

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Best, Netherlands

Godefridus A M Hurkx