National Semiconductor Corporation

Lsi Logic Corporation

Texas Instruments Corporation

Gobi R Padmanabhan

Visvamohan Yegnashankaran

Abraham Fong Yee

Stanley Wen-Chin Yeh

Tim Carmichael

Joseph M Zelayeta

Sheldon Aronowitz

Douglas Ticknor Grider

Richard D Schinella

Reda R Razouk

James O Kimball

Michael J Colwell

Teh-Kuin Lee

Joseph Domenick Montalbo

Yu-Lam Ho

Chi-Yi Kao

Jane Ct Chiu

Alexander H Owens

John P Daane

James W Hively

Prabhakar Pati Tripathi

Brian Lester Halla

Jasopin Lee

Peter Yi-Ning Wang

Mark P Stager

Various semiconductor devices can be formed at the end of a common fabrication process, thereby significantly improving manufacturing flexibility, by selectively wiring bonding different CMOS circuits to different MEMS, which are formed on the same semiconductor die. A semiconductor device that has a number of CMOS circuits and a number of MEMS is formed on the same semiconductor wafer in adjacent regions on the wafer, and then diced such that the CMOS circuits and the MEMS are formed on the same die. After dicing, different CMOS circuits and different MEMS can be selectively connected during the wire bonding step to form the different semiconductor devices.

Semiconductor wafer and die that include an integrated circuit and two or more different MEMS-based semiconductor devices

A method of forming capacitive structures in trenches which have been formed in a multilevel metal interconnect structure is disclosed. The method of forming the capacitive structures allows the capacitance of the multilevel metal interconnect structure to be adjusted, and thereby optimized, to respond to signals from devices that are formed on an underlying substrate.

Method of forming a metal interconnect with capacitive structures that adjust the capacitance of the interconnect

A semiconductor sensor device is formed using MEMS technology by placing a thin layer of single-crystal silicon, which includes semiconductor devices, over a cavity, which has been formed in a semiconductor material. The thin layer of single-crystal silicon can be formed by forming the semiconductor devices in the top surface of a single-crystal silicon wafer, thinning the silicon wafer to a desired thickness, and then dicing the thinned wafer to form silicon layers of a desired size. The MEMS device can be used to implement a pressure sensor, microphone, temperature sensor, and a joystick.

MEMS semiconductor sensor device

The width of the gate of a MOS transistor can be formed to have nanometer-width gate sizes, which are substantially less than the minimum feature size that can be photolithographically obtained with the method that is used to fabricate the MOS transistors, in a litho-less process by utilizing a conductive side wall spacer to form the gate of the MOS transistor.

Method of forming a MOS transistor with a litho-less gate

The present invention provides a capsule endoscope (CE) having sensors configured to form or to conform to the shell of the CE. The sensors are curved to correspond to the capsule's shape. According to this embodiment, the sensors may be covered by a coating material to protect the sensors. The sensors may also form the capsule shell. Instead of being covered by a shell associated with the capsule, the sensors are formed as the capsule shell. The sensors may also form part of the capsule shell. For example, one half of the capsule shell may be formed from the sensors.

Sensor configuration for a capsule endoscope

Thermal hot spots in the substrate of a semiconductor die, and the required surface area of the semiconductor die, are substantially reduced by forming thermal or thermal and electrical pipes in the substrate that extend from a bottom surface of the substrate to a point near the top surface of the substrate.

Method of forming a semiconductor die with heat and electrical pipes

Method of selectively forming MEMS-based semiconductor devices at the end of a common fabrication process

A resistor, a transistor, and a capacitor can be fabricated on a semiconductor wafer in a process that forms an isolated single-crystal region with precise dimensions. The isolated single-crystal region, in turn, defines the body of the resistor, the gate of the transistor, and the top plate of the capacitor.

Single-crystal silicon semiconductor structure

Semiconductor sensor device using MEMS technology

A semiconductor die is formed in a process that forms a trench opening in the semiconductor material prior to the formation of the contacts and the metal-1 layer. When contacts are then formed to contact circuit structures, such as a doped region in the top surface of the semiconductor material, a trench contact is formed that fills up the trench opening. During the final steps of the process, the back side of the semiconductor material is ground down to expose the trench contact. The wafer is cut to form a plurality of dice, and the exposed edges of the dice are protected.

Method of forming a hermetic seal for silicon die with metal feed through structure

Semiconductor die with heat and electrical pipes

A semiconductor wafer is diced utilizing a method that etches down to the top surface of the semiconductor wafer a number of times, such as during and following the formation of the metal interconnect structure, and then thins the semiconductor wafer from the back side until the semiconductor wafer singulates.

Method of dicing a semiconductor wafer that substantially reduces the width of the saw street

A capsule endoscope (CE) having a field of view that may be dynamically adjusted. The CE includes an illuminator that may be an optical or acoustical illuminator designed to illuminate the lining of a GI tract. A scanner, such as a MEMS scanner may be used to scan the illumination source onto the lining. The scanner may be controlled to dynamically adjust the field of view. A lenslet array may also be used to focus the illumination. The sensor is formed such that it may be curved to a contour and includes a support having sufficient flexibility such that it can be formed to the contour. The substrate includes the sensor and is formed sufficiently thin so that it can be shaped to the contour. The substrate is coupled with the support such that the combination can be formed to the contour.

Method and system for dynamically adjusting field of view in a capsule endoscope

The capacitance of a multilevel metal interconnect formed on a semiconductor substrate can be adjusted, and thereby optimized, to respond to signals from devices that are formed on the underlying substrate by forming capacitive structures in trenches which have been formed using the top metal layer as a mask.

Multilevel metal interconnect and method of forming the interconnect with capacitive structures that adjust the capacitance of the interconnect

A vertical MOS transistor has a very short channel length that is indirectly defined by the thickness of a layer of semiconductor material or the depths of implants. The transistor has a first (source/drain) region formed in a substrate material, a semiconductor region formed on the first region, and a second (source/drain) region formed in the top surface of the semiconductor region. The distance between the first region and the second region defines the channel length of the transistor.

Growing community of inventors

Sunnyvale, CA, United States of America

Gobi R Padmanabhan