USA As Represented by Secretary of the Navy

Glenn S Sugawara

Maurice J Griffin

A system for storing an arbitrary waveform on non-volatile random access ory (NVRAM) device and generating an analog signal using the NVRAM device. A central processing unit is used to synthesize an arbitrary waveform and create a digital representation of the waveform and transfer the digital representation to a microprocessor which, in turn, writes the digital data into an NVRAM device which has been mapped into a portion of the microprocessor address space. The NVRAM device is removed address space and placed into an independent waveform generation unit. In the waveform generation unit, an address clock provides an address timing signal and a cycle clock provides a transmit signal. Both signals are applied to an address generator. When both signals are present, the address generator generates and transmits to the NVRAM device a new address for each cycle of the address timing signal. In response to each new address generated, the NVRAM devices provides a digital output which is applied to a digital to analog converter. The converter produces a continuous analog output which is smoothed by a filter to produce the arbitrary waveform.

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Portsmouth, RI, United States of America

Glenn S Sugawara