Texas Instruments Corporation

Glenn C Mayfield

Bryan E Bloodworth

Indumini W Ranmuthu

Tuan V Ngo

Davy H Choi

Paul Merle Emerson

Kerry C Glover

Echere Iroaga

Mark A Wolfe

Jefferson W Gamble

Thomas Cougar VanEaton

An apparatus for use in applying write signals for driving a write head to effect writing information to a memory device; the write signals including a first write signal and a second write signal; includes: (a) a directing circuit receiving the write signals, directing a current to establish a voltage across the write head in a first excursion toward a first polarity in response to the first write signal and directing the current to establish the voltage across the write head in a second excursion toward a second polarity substantially opposite the first polarity in response to the second write signal; (b) a first boost system coupled with the directing circuit and boosting the write voltage toward the first polarity during the first excursion; and (c) a second boost system coupled with the directing circuit and boosting the write voltage toward the second polarity during the second excursion.

Apparatus and method for applying write signals for driving a write head

An integrated circuit having a pinout configuration, having a first configuration of pins and a circuit to change the integrated circuit to a second configuration of pins.

Fuse selectable pinout package

A read channel (18) for use in a mass storage system is provided. The read channel (18) includes a plurality of circuit modules circuit and an error estimation circuit (50). The plurality of circuit modules may include circuitry such as a VGA (40), an LPF (42), and an equalizer (48), for conditioning an analog data signal. The plurality of circuit modules receive the analog data signal from a disk/head assembly (12) and condition the signal to generate a digital data signal. The error estimation circuit (50) receives an analog signal from one of the plurality of circuit modules, such as the equalizer (48), and analyzes the analog signal to generate an analog error output signal (94) that is used in the read channel (18) and provided to external circuitry.

Error estimation circuit and method for providing a read channel error

A method is disclosed for modifying the operational bandwidth of a signal amplification circuit, comprising the steps of providing an amplification circuit for amplifying the electrical signal, providing circuitry to selectably modify capacitive loading within the amplification circuit and coupled to the amplification circuit, and using the circuitry to selectively modify capacitive loading to alter a dominant pole of the amplification circuit, resulting in a modification of the operational bandwidth of the amplification circuit. A user switchable circuit 220 is coupled to an amplification portion (202, 204, 206, 208, 210, 216, 218) of the amplification circuitry such that a user may selectively activate or deactivate the switchable circuitry, effecting a corresponding and balanced increase or decrease of the capacitive loading within the amplification circuitry. The balanced nature of the capacitive loading changes, effected by the user switchable circuitry, provides the advantage of minimizing the effects of common mode noise and instability in the amplifier circuitry.

System for user programmable bandwidth of amplifier circuitry

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Garland, TX, United States of America

Glenn C Mayfield