Amkor Technology, Inc.

Unitive International Limited

Mcnc

Amkor Technology Singapore Holding Pte. Ltd.

Unitive Electronics Inc.

Northern Telecom Limited

Unitivie International Limited

Unitive International Limited Curaco

Glenn A Rinne

Jin Han Kim

Choon Heung Lee

Dong Jin Kim

Yeong Beom Ko

Jin Young Kim

Nicholas G Koopman

J Daniel Mis

Krishna K Nair

Daniel Richter

Do Hyung Kim

William E Batchelor

Devarajan Balaraman

Greg Hames

Doo Hyun Park

Seong Min Seo

Ju Hoon Yoon

Iwona Turlik

Philip A Deane

Dean Zehnder

Paul A Magill

Joseph Daniel Mis

Edward K Yung

Seung Jae Lee

Mark Windsor Roberson

Sung Kyu Kim

Stephen M Bobbio

Dong Hoon Lee

Christopher J Berry

Se Woong Cha

Yoon Joo Kim

No Sun Park

Karen W Markus

Gretchen Adema

Kevin Engel

Julia Roe

Susan Bumgarner

Pooja Chilukuri

Christine Rinne

Byong Jin Kim

Ji Young Chung

Ludovico Estrada Bancod

Robert Lanzone

William Boyd Rogers

Christine Lizzul

Curtis Grant Jones

Chirstopher John Berry

Provided are a semiconductor device using, for example, an epoxy molding compound (EMC) wafer support system and a fabricating method thereof, which can, for example, adjust a thickness of the overall package in a final stage of completing the device while shortening a fabricating process and considerably reducing the fabrication cost. An example semiconductor device may comprise a first semiconductor die that comprises a bond pad and a through silicon via (TSV) connected to the bond pad; an interposer comprising a redistribution layer connected to the bond pad or the TSV and formed on the first semiconductor die, a second semiconductor die connected to the redistribution layer of the interposer and positioned on the interposer; an encapsulation unit encapsulating the second semiconductor die, and a solder ball connected to the bond pad or the TSV of the first semiconductor die.

Semiconductor device using EMC wafer support system and fabricating method thereof

A semiconductor device structure and a method for manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a method for manufacturing a semiconductor device that comprises ordering and performing processing steps in a manner that prevents warpage deformation from occurring to a wafer and/or die due to mismatching thermal coefficients.

Semiconductor device and manufacturing method thereof

An electronic device and a manufacturing method thereof. As non-limiting examples, various aspects of this disclosure provide an electronic device having a top side pin array, for example which may be utilized for three-dimensional stacking, and a method for manufacturing such an electronic device.

Electronic device with top side pin array and manufacturing method thereof

Provided is a disclosure for optimizing the number of semiconductor devices on a wafer/substrate. The optimization comprises laying out, cutting, and packaging the devices efficiently.

Method and system for packing optimization of semiconductor devices

Manufacturing method of semiconductor device and semiconductor device thereof

A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a method of manufacturing a semiconductor device comprising forming interconnection structures by at least part performing a lateral plating process, and a semiconductor device manufactured thereby.

Semiconductor device and method of manufacturing thereof

A semiconductor package and manufacturing method thereof are disclosed and may include a first semiconductor device comprising a first bond pad on a first surface of the first semiconductor device, a first encapsulant material surrounding side edges of the first semiconductor device, and a redistribution layer (RDL) formed on the first surface of the first semiconductor device and on a first surface of the encapsulant material. The RDL may electrically couple the first bond pad to a second bond pad formed above the first surface of the encapsulant material. A second semiconductor device comprising a third bond pad on a first surface of the second semiconductor device may face the first surface of the first semiconductor device and be electrically coupled to the first bond pad on the first semiconductor device. The first surface of the first semiconductor device may be coplanar with the first surface of the encapsulant material.

Semiconductor package and manufacturing method thereof

Growing community of inventors

Cary, NC, United States of America

Glenn A Rinne