Intel Corporation

Glenford J Myers

Konrad K Lai

Michael T Imel

Glenn J Hinton

James A Valerio

Randy L Steck

Robert Riches

Apparatus for performing mixed precision calculations in the floating point unit of a microprocessor from a single instruction opcode. 80-bit floating-point registers (44) may be specified as the source or destination address of a floating-point instruction. When the address range of the destination indicates (26) that a floating point register is addressed, the result of that operation is not rounded to the precision specified by the instruction, but is rounded (58) to extended 80-bit precision and loaded into the floating point register (FP-44). When the address range of the source indicates (26) that an FP register is addressed, the data is loaded from the FP register in extended precision, regardless of the precision specified by the instruction. In this way, real and long-real operations can be made to use extended precision numbers without explicitly specifying that in the opcode.

Mixed-precision floating point operations from a single instruction

A plurality of global registers are provided on the microprocessor chip. One of a global registers is a frame pointer register containing the current frame pointer, and the remainder of the global registers are available to a current process as general registers. A plurality of floating point registers are also provided for use by the current process in execution of floating point arithmetic operations. A register set pool made up of a plurality of register sets is provided, each register set being comprised of a number of local registers. When a call instruction is decoded, a register set of local registers from the register set pool is allocated to the called procedure, and the frame pointer register is initialized. When a return instruction is decoded, the register set is freed for allocation to another procedure called by a subsequent call instruction. If the register set pool is depleted a register set associated with a previous procedure is saved in the main memory, and that register set is allocated to the current procedure. The local registers in a register set associated with a procedure contain linkage information including a pointer to the previous frame and an instruction pointer, thus enabling most call and return instructions to execute without needing any references to off-chip memory.

Stack frame cache on a microprocessor chip

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Aloha, OR, United States of America

Glenford J Myers