Evans & Sutherland Computer Corporation

Glen A Eckart

Gary S Watkins

Russell A Brown

William Armstrong

Front end processors in a graphics architecture execute parallel scan conversion and shading to process individually assigned primitive objects for providing update pixels. A crossbar along with groups of first-in-first-out registers (FIFOs) accommodates data flow to parallel pixel processors with associated memory capabilities (frame buffer banks) where visibility and blending operations are performed on predetermined sequences of update pixels to provide frame buffer pixels and ultimately display pixels. The pixel processors identify with sequences of pixels in the display in patterns designed to equalize processor loads for pixels located along scan lines of a raster, or distributed over an area. Update pixel data is tagged to identify FIFO groups (pixel processors) individual FIFO selection and output sequence. Temporal priority is accomplished so that primitive data is entered in the frame buffer banks (components) restored to the same order as generated at the central processor (CPU) level.

Computer graphics parallel system with temporal priority

Front end processors in a graphics architecture execute parallel scan conversion and shading to first process individually assigned primitive objects for providing update pixels. A crossbar accommodates data rearrangement whereby parallel pixel processors with associated memory capabilities (frame buffer banks) perform visibility and blending operations on predetermined sequences of update pixels to provide display pixels. The pixel processors identify with sequences of pixels in the display in patterns designed to equalize processor loads for pixels located along scan lines or distributed over an area. Specific distribution criteria are disclosed for patterns. One form of pixel processor organization incorporates a distributed frame buffer with FIFO memory and control stacks. Display pixels are received by a multiplexer to supply a digital-analog connector with display data in raster sequence.

Computer graphics system with parallel processing using a switch

Image data is composed from primitives (polygons) to attain data for displays with the removal of hidden surfaces and smooth-appearing edges. Defined polygons are tested for priority in a determined field of vision by scan conversion to specify individual picture elements (pixels). Polygon contention for pixels is resolved by determining the edge of intersection between the planes of such polygons and testing the signs of certain values in accordance with predetermined criteria. Subpixel priority is treated for similar resolution to provide improved antialiased images.

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Salt Lake City, UT, United States of America

Glen A Eckart