Stats Chippac Pte. Ltd.

Giwoong Nam

Junghwan Jang

Myongsuk Kang

Taekyu Choi

Sanghyun Park

Jaeseung Lee

Inhee Hwang

Yeongwon Kang

Jin Kwak

Inho Son

A semiconductor device has a substrate and a first light sensitive material formed over the substrate. A plurality of first conductive posts is formed over the substrate by patterning the first light sensitive material and filling the pattern with a conductive material. A plurality of electrical contacts is formed over the substrate and the conductive posts are formed over the electrical contacts. A first electric component is disposed over the substrate between the first conductive posts. A plurality of second conductive posts is formed over the first electrical component by patterning a second light sensitive material and filling the pattern with conductive material. A first encapsulant is deposited over the first electrical component and conductive posts. A portion of the first encapsulant is removed to expose the first conductive posts. A second electrical component is disposed over the first electrical component and covered with a second encapsulant.

Semiconductor device and method of forming vertical interconnect structure for pop module

The present application relates to a developing apparatus. The developing apparatus comprises a housing; a wafer support disposed within the housing and for holding a wafer; a semipermeable diaphragm disposed within the housing and separating the housing into an upper housing defining an upper chamber and a lower housing defining a low chamber, wherein the semipermeable diaphragm is semipermeable to moisture such that moisture is allowed to move from the lower chamber to the upper chamber, but liquid drops are prohibited to move from the upper chamber to the lower chamber; and a nozzle assembly disposed above the wafer support and for spraying at least developer to the wafer support.

Developing apparatus and substrate processing apparatus

A semiconductor device has a semiconductor die. A first dielectric layer is formed over the semiconductor die. A second dielectric layer is formed over the first dielectric layer. A trench is formed in the second dielectric layer. A via opening is formed to expose a contact pad of the semiconductor die within the trench. A seed layer is formed over the second dielectric layer. The seed layer extends into the trench and via opening. A conductive material is deposited into the via opening and trench. The conductive material is overburdened from the trench. The seed layer around the conductive material is etched in a first etching step. The conductive material is etched in a second etching step.

Semiconductor device and method of forming an embedded redistribution layer

A semiconductor manufacturing device has an outer cup and inner cup with a wafer suction mount disposed within the outer cup. A photoresist material is applied to a first surface of a semiconductor wafer disposed on the wafer suction mount while rotating at a first speed. A gas port is disposed on the inner cup for dispensing a gas oriented toward a bottom side of the semiconductor wafer. The gas port purges a second surface of the semiconductor wafer with a gas to remove contamination. The second surface of the semiconductor wafer is rinsed while purging with the gas. The gas can be a stable or inert gas, such as nitrogen. The contamination is removed from the second surface of the semiconductor wafer through an outlet between the inner cup and outer cup. The semiconductor wafer rotates at a second greater speed after discontinuing purge with the gas.

Semiconductor device and method of coating a semiconductor wafer with high viscosity liquid photoresist using N2 purge

Semiconductor device and method of forming vertical interconnect structure for PoP module

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Incheon, South Korea

Giwoong Nam