Mentor Graphics Corporation

Logicvision, Inc.

Givargis Avareh Danialy

Stephen Kenneth Sunter

Martin Keim

Michael Howells

Martin J Bell

Stephen V Pateras

Charles Mc Donald

A reconfigurable scan network in a circuit is configured such that a first scan path is used if a programmable component has no stuck-at fault and a second scan path is used if the programmable component has a stuck-at fault. A test pattern having a length equal to a length of the second path is shifted into the reconfigurable scan network, and a part or a whole of the test pattern is then shifted out from the reconfigurable scan network. The part or the whole of the test pattern being shifted out is analyzed to determine whether the programmable component has the stuck-at fault.

Reconfigurable scan network defect diagnosis

A software and hardware system and an associated methodology provides ATE-independent go/no-go testing as well as advanced failure diagnosis of integrated circuits for silicon debug, process characterization, production (volume) testing, and system diagnosis comprises an embedded test architecture designed within an integrated circuit; means for seamlessly transferring information between the integrated circuit and its external environment; and an external environment that effectuates the seamless transfer for the user to perform relevant test and diagnosis.

Method, system and program product for testing and/or diagnosing circuits using embedded test controller access data

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San Jose, CA, United States of America

Givargis Avareh Danialy