Texas Instruments Corporation

Girish Nadiger

Jaiganesh Balakrishnan

Sreenath Narayanan Potty

Aswath Vs

Jawaharlal Tangudu

Sriram Murali

Sundarrajan Rangachari

Pankaj Gupta

Ajai Paulose

Divyansh Jain

Ankur Jain

Kapil Kumar

Crest factor reduction circuitry includes: a peak neighborhood analyzer; peak detection circuitry and a controller. The peak neighborhood analyzer is configured to: receive an input signal; analyze the input signal to determine whether a peak larger than a target threshold is expected within an interval; and provide a first control signal responsive to determining that a peak larger than the target threshold is expected within the interval. The controller is configured to: receive the first control signal; and gate a clock or data to the peak detection circuitry responsive to the first control signal.

Power efficient crest factor reduction

An example apparatus includes: nonlinearity function selection circuitry with an output, the nonlinearity function selection circuitry to select a type of a nonlinearity function, the nonlinearity function to model nonlinearity portions of data output from an analog-to-digital converter, nonlinearity function term generation circuitry with a first input coupled to the output, the nonlinearity function term generation circuitry to generate one or more nonlinearity function terms of the nonlinearity function based on the type of the nonlinearity function and the data, and coefficient determination circuitry with a second input coupled to the output, the coefficient determination circuitry to determine one or more nonlinearity function coefficients based on the one or more nonlinearity function terms, the nonlinearity portions of the data to be compensated based on the one or more nonlinearity function coefficients.

High order nonlinearity estimation of radiofrequency analog-to-digital converters

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Bengaluru, India

Girish Nadiger