Qualcomm Incorporated

Girish Koppassery

Madhukar Vallabhaneni

Amjath Husain

Jingcheng Zhuang

Xinhua Chen

Samiran Dasgupta

Abhay Shankar Gaikwad

An amplifier circuit includes an amplifier core having a cascode transistor and a gain transistor, a bias circuit coupled to the amplifier core, the bias circuit comprising: a first current source, a second current source, an operational transconductance amplifier (OTA), a bias cascode transistor pair having a bias cascode transistor and a bias gain transistor, and a replica circuit coupled to the first current source and to the second current source.

Circuit and method for biasing an amplifier

Aspects of the present disclosure provide a circuit configured to adjust an input impedance of an amplifier such as a low-noise amplifier. In certain aspects, the circuit is coupled to a node, wherein the node is between a first transistor and a second transistor of the amplifier. The circuit may include an inductor and a capacitor coupled in series, wherein the inductor is coupled with one or more load inductors of the amplifier through negative magnetic coupling.

Low-noise amplifier (LNA) input impedance adjustment circuit

An electronic apparatus is disclosed that implements a distributed differential interconnect. In an example aspect, the electronic apparatus includes a first endpoint having a first differential connection interface and a second endpoint having a second differential connection interface. The electronic apparatus also includes a differential interconnect coupled between the first differential connection interface and the second differential connection interface. The differential interconnect includes a plus pathway and a minus pathway. The plus pathway extends between the first differential connection interface and the second differential connection interface, with the plus pathway including multiple plus conductors. The minus pathway extends between the first differential connection interface and the second differential connection interface, with the minus pathway including multiple minus conductors.

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Bengaluru, India

Girish Koppassery