Semiconductor Components Industries, LLC

Aptina Imaging Corporation

Lfoundry S.r.l.

Giovanni De Amicis

Andrea Del Monte

Giovanni Margutti

Gianluca Testa

Daniel Tekleab

Onorato Di Cola

Fabio Spaziani

A method to perform hybrid bonding of two semiconductor wafers without using a dedicated tool for thermo-compression is disclosed. According to the herein disclosed technique, the semiconductor wafers to be bonded together may be placed in an oven simply staying one upon the other without applying any additional compression between them besides their own weight. This outstanding result has been attained using of a particular type of thermosetting materials, namely siloxane polymers of the type that shrink when cured. Among these siloxane polymers, the siloxane polymers of the type SC-480, siloxane polymers of the series SC-200, SC-300, SC-400, SC-500, SC-700, SC-800 and mixtures thereof are particularly suitable.

Hybrid bonding method for semiconductor wafers and related three-dimensional integrated device

An image sensor may include isolation regions that are formed in between photodiodes. These isolation regions may prevent cross-talk and improve the performance of the image sensor. The isolation regions may include a conductive layer that is electrically connected to a bias voltage supply line. Biasing the conductive layer may result in a charge inversion in the substrate adjacent to the conductive layer. The charge inversion may prevent the generation of dark current. The conductive layer may be formed on a liner oxide layer in trenches formed in epitaxial silicon. A connecting layer may be used to electrically connect each conductive layer. The connecting layer may be formed integrally with the conductive layer or formed from a separate material.

Pixel isolation regions formed with conductive layers

An imaging system may include an imager integrated circuit with frontside components such as imaging pixels and backside components such as color filters and microlenses. The imager integrated circuit may be mounted to a carrier wafer with alignment marks. Bonding marks on the carrier wafer and the imager integrated circuit may be used to align the carrier wafer accurately to the imager integrated circuit. The alignment marks on the carrier wafer may be read, by fabrication equipment, to align backside components of the imager integrated circuit, such as color filters and microlenses, with backside components of the imager integrated circuit, such as photodiodes.

Alignment marks and alignment methods for aligning backside components to frontside components in integrated circuits

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L'Aquila, Italy

Giovanni De Amicis