Avago Technologies Ecbu IP (singapore) Pte. Ltd.

Avago Technologies General IP (singapore) Pte. Ltd.

Avago Technologies Ecbu IP Pte. Ltd.

Pixart Imaging Incorporated

Avago Technologies Ecb4 IP Pte Ltd

Gim Eng Chew

Chung Min Thor

Rene P Helbing

Kee Yean Ng

Janet Bee Yin Chua

Thye Linn Mok

Mei Yee Ng

Farn Hin Chen

Kheng Hin Toh

Boon Keat Tan

Wooi Kin Goon

Eit Thian Yap

Wool Kin Goon

Kean Loo Keh

Tong Fatt Chew

Joon Chok Lee

Yew Cheong Kuan

Chin Hin Oon

Kevin Len Li Lim

Kok Chin Pan

Alex Jianzhong Chen

Tong Tee Tan

Kevin John Theseira

Weng Chong Sam

Nanta-Kumar Payandi

Aik Yean Tang

Swee Lin Thor

Kheng Guan Peh

Yih Sien Teh

Chee Wai Ng

An interpolation circuit comprising: a phase shift circuit, configured to generate a plurality of phase shift signals; a first multiplexer configured to receive at least portion of the phase shift signals; a first comparator, comprising a first positive input terminal and a first negative input terminal; a second comparator, comprising a second positive input terminal and a second negative input terminal; a first state control circuit, configured to control the first multiplexer to switch to a different state according to a first comparing result and a second comparing result, wherein the first multiplexer outputs different ones of the phase shift signals in different states; and a first voltage level compensating circuit, configured to pull up or pull down a first output signal from the first output terminal or a second output signal from the second output terminal when the state of the first multiplexer changes.

Interpolation circuit and motor driving circuit

An LED current regulator can regulate an LED current of an encoder system. The LED current regulator may comprise a first analog multiplier and a second analog multiplier. Each of the first and second analog multipliers may be configured to receive respective photodetector output signals, characterized by a peak-to-peak voltage, Vpp, and may be configured to generate respective first and second multiplier output signals. The first and second multiplier output signals may be combined to produce a first DC level, which may be representative of the peak-to-peak voltage, Vpp, of the photodetector output signals.

Optical encoder with a current regulating circuit for a light emitter

Disclosed are various embodiments of circuitry and methods to compensate for variations in hysteresis associated with the comparators of an interpolation circuit in a single track optical encoder. Such variations in hysteresis may be minimized or eliminated by providing appropriately configured resistor ladder circuits to condition the inputs to the comparators, or by programming or trimming resistors in positive feedback loops of the comparators. The single track optical encoder configurations disclosed herein permit very high resolution reflective optical encoders in small packages to be provided. Methods of making and using such optical encoders are also disclosed.

Hysteresis-compensating interpolation circuits in optical encoders

An offset correction system for correcting signal offset of an encoder. The offset correction system may include a light emitter, an encoder disk, a reticle, a light detector; an offset detection circuit and an offset correction circuit. The offset detection circuit may comprise a comparator and an offset detector configured to receive sinusoidal output signals from the light detector and a reference signal to create digital pulses for determining the signal offset. The offset correction circuit may be configured to apply a gain to correct the offset output signal. The offset correction may be implemented in real time mode.

Optical encoder with signal offset correction system

Disclosed are various embodiments of a single track reflective optical encoder featuring current amplifiers disposed in the signal generating circuit thereof. Voltage amplifiers and their associated feedback resistors are eliminated in the various embodiments disclosed herein, resulting in decreased die size and improved encoder signal accuracy and performance, especially at high speeds The single track optical encoder configurations disclosed herein permit very high resolution reflective optical encoders in small packages to be provided. Methods of making and using such optical encoders are also disclosed.

High resolution, high speed, miniaturized optical encoder

Disclosed are various embodiments of a single track reflective optical encoder featuring increased spatial resolution, reduced cross-talk between adjoining photodiodes, and increased amplitude output signals from individual photodiodes. With respect to prior art single track optical encoders, some photodiodes are removed from a photodiode array, while nevertheless maintaining appropriate phase relationships between pairs of A and A\, and B and B\, photodiodes. Such a configuration of photodiodes results in increased inter-photodiode spacing, and thereby permits spatial resolution to be increased while boosting current outputs from individual photodiodes. The single track optical encoder configurations disclosed herein permit very high resolution reflective optical encoders in small packages to be provided. In addition, the single track configuration reduces problems with misalignment between code scales and light detectors, permits relatively simple electronic circuitry to be used to process outputs, and reduces manufacturing, assembly, integrated circuit and encoder costs. Methods of making and using such optical encoders are also disclosed.

High resolution single track optical encoder

Disclosed are various embodiments of temperature-compensated relaxation oscillator circuits that may be fabricated using conventional CMOS manufacturing techniques. The relaxation oscillator circuits described herein exhibit superior low temperature coefficient performance characteristics, and do not require the use of expensive off-chip high precision resistors to effect temperature compensation. Positive and negative temperature coefficient resistors arranged in a resistor array offset one another to provide temperature compensation in the relaxation oscillator circuit.

Temperature compensation circuit and method

Disclosed are various embodiments of pulse generation and automatic gain control ('AGC') circuits and corresponding methods that are especially well suited for use in motion encoding systems. Analog output signals provided by a motion encoder serve as inputs to the pulse generation circuit, where peaks, valleys and/or crosspoints corresponding to such analog signals are first detected and then employed to generate output pulses corresponding thereto. These output pulses are next provided to an AGC circuit as self-generated clock signals which control the time windows over which the analog signals of the motion encoder are sampled and processed by the AGC circuit so as to adjust the gains applied to such analog signals.

Automatic gain control for motion encoder signals

According to one embodiment, there is provided a device and method for correcting code wheel misalignment which employs upper and lower code wheel misalignment photodetectors positioned above and below at least first and second motion detection photodetectors. According to other embodiments, there are provided a device and method for automatically setting the gain of an output circuit in an optical encoder. Still further embodiments of optical encoders combine the code wheel misalignment and automatic gain control features of the invention.

Optical encoder with code wheel misalignment detection and automatic gain control

Disclosed are various embodiments of interpolation circuits for use in conjunction with motion encoders. The analog output signals provided by incremental or absolute motion encoders are provided to an interpolation circuit, which is capable of providing high interpolation factor output signals having high timing accuracy. Problems with noise spikes common to zero-hysteresis comparators typically employed in interpolation circuits are eliminated, as are problems with time delays differing between comparators that do feature hysteresis. The disclosed interpolation circuits may be implemented using CMOS processes without undue effort.

Interpolation accuracy improvement in motion encoder systems, devices and methods

Disclosed are various embodiments of interpolation circuits for use in conjunction with optical encoders. The analog output signals provided by incremental or absolute motion encoders are provided to an interpolation circuit, which is capable of providing high interpolation factor output signals having high timing accuracy. The disclosed interpolation circuits may be implemented using CMOS or BiCMOS processes without undue effort.

A method for determining the light intensity of a light signal in each of a plurality of spectral bands is disclosed and a method for fabricating a photodetector is also disclosed.

Photodetector having dark current correction

According to one embodiment, there is provided an optical encoder having a photodetector array comprising motion detection photodetectors and at least one reference photodetector vertically offset from the motion detection photodetectors. The output signal generated by the at least one reference photodetectors is employed to correct undesired variations in the amplitudes of the output signals generated by the motion detection photodetectors. Such variations typically arise from various mechanical and optical misalignments in the optical encoder, and are compensated for by using the reference output signal to add to or subtract from, as required, the amplitudes of motion detection output signals.

Optical encoder with amplitude correction

A photodetector and method for making the same is disclosed. The photodetector includes a substrate having first, second, and third photodiodes and first and second pigment filter layers. The first, second, and third photodiodes generate first, second, and third photodiode output signals, respectively, each photodiode output signal being indicative of a light intensity incident on that photodiode and a dark current that is independent of the light intensity. The first and second pigment filter layers overlie the first and second photodiodes while a layer having both the first and second pigment filter layers overlie the third photodiode. An output circuit combines the first and third photodiode output signals to provide a first corrected output signal and combines the second and third photodiode output signals to provide a second corrected output signal.

Growing community of inventors

Penang, Malaysia

Gim Eng Chew