Advanced Micro Devices Corporation

Other

Globalfoundries Inc.

Gilles Amblard

Bhanwar Singh

Ramkumar Subramanian

Khoi A Phan

Harry Jay Levinson

Cyrus E Tabery

Ivan Lalovic

Bruno M LaFontaine

Adam R Pawloski

Jeffrey A Schefske

Amr Yehia Abdo

Frank Tsai

Srikanteswara Dakshina-Murthy

Rohit R Rosario

Disclosed are methods for eliminating and/or mitigating the formation of footing and/or T-tops in a resist pattern. A substrate with or without an antireflective coating layer may be treated with an acidic composition prior to the formation of a resist layer. The acid treatment prevents the loss of photo generated acid from the resist by either quenching and/or neutralizing the bases, and thereby reduces the formation of footing. The surface of a resist layer which has been irradiated may be treated with an acidic composition prior to post-exposure bake. The acid treatment prevents the loss of photo generated acid from the resist by either compensating for the evaporation and/or neutralization of the bases and thereby prevents the formation of T-tops.

Surface treatment with an acidic composition to prevent substrate and environmental contamination

A process for fabricating a semiconductor device, including applying an immersion lithography medium to a surface of a semiconductor wafer; exposing a material on the surface of the semiconductor wafer to electromagnetic radiation having a selected wavelength; and applying supercritical carbon dioxide to the semiconductor wafer to remove the immersion lithography medium from the surface of the semiconductor wafer. In one embodiment, the process includes recovery of the immersion lithography medium.

Method for removal of immersion lithography medium in immersion lithography processes

A method for patterning a photo-resist in an immersion lithography process is described. The method includes forming a photo-resist layer above a substrate. A hydrophobic and contrast-enhancing barrier layer is formed above the photo-resist layer. The photo-resist layer is exposed, through the hydrophobic and contrast-enhancing barrier layer, to a light source. The photo-resist layer is developed to provide a patterned photo-resist layer.

Method for patterning a photo-resist in an immersion lithography process

The present invention relates generally to photolithographic systems and methods, and more particularly to systems and methodologies that facilitate the reduction of line-edge roughness (LER) during gate formation in an integrated circuit. Systems and methods are disclosed for improving critical dimension (CD) of photoresist lines, comprising a non-lithographic shrink component that facilitates mitigating LER, and a trim etch component that facilitates achieving and/or restoring a target critical dimension.

Combination of non-lithographic shrink techniques and trim process for gate formation and line-edge roughness reduction

Systems and method for adjusting an etch rate of an organic bottom antireflective coating (BARC) layer on a wafer. The BARC layer can be exposed to an energy source at varied intensities to determine a relationship between bake temperature and solubility of the BARC after baking, which correlates to a rate at which the BARC can be etched. The BARC can be a cross-linking BARC, which becomes more cross-linked as bake temperature is increased, resulting in decreased etch rate, or can be a cleaving BARC, which is subject to removal of etch-resistant monomers as bake temperature is increased, resulting in increased etch rate. Thus, the invention provides for adjustable BARC etch rates that can be aligned to an etch rate of a photoresist deposited over the BARC to permit concurrent etching of both layers while mitigating structural defects that can occur if etch rates of the respective layers differ.

Organic BARC with adjustable etch rate

The present invention relates generally to photolithographic systems and methods, and more particularly to systems and methodologies that facilitate improved critical dimension (CD) control and the reduction of line-edge roughness (LER) during pattern line formation in an imprint mask. One aspect of the invention provides for forming features having CDs that are larger than ultimately desired in a mask resist. Upon application of a non-lithographic shrink technique, LER is mitigated and CD is reduced to within a desired target tolerance.

Use of non-lithographic shrink techniques for fabrication/making of imprints masks

The present invention relates generally to photolithographic systems and methods, and more particularly to systems and methodologies that facilitate the reduction of line-edge roughness (LER) and/or standing wave expression during pattern line formation in an integrated circuit. Systems and methods are disclosed for retaining a target critical dimension (CD) of photoresist lines, comprising a non-lithographic shrink component that facilitates mitigating LER and/or standing wave expression, wherein the shrink component is employed to heat a particular resist to the glass transition temperature of the resist to effectuate mitigation of LER and/or standing wave expression. Additionally, by heating the resist to its glass transition temperature, the systems and methods of the present invention effectively impede deviation from a desired target critical dimension.

Non-lithographic shrink techniques for improving line edge roughness and using imperfect (but simpler) BARCs

Disclosed are immersion lithography methods involving using a base developer as an immersion lithography fluid. Consequently, it is unnecessary to contact a developer with an irradiated resist after the immersion lithography fluid is removed.

Use of base developers as immersion lithography fluid

A method of operating an immersion lithography system, including steps of immersing at least a portion of a wafer to be exposed in an immersion medium, wherein the immersion medium comprises at least one bubble; directing an ultrasonic wave through at least a portion of the immersion medium to disrupt and/or dissipate the at least one bubble; and exposing the wafer with an exposure pattern by passing electromagnetic radiation through the immersion medium subsequent to the directing. Also disclosed is a monitoring and control system for an immersion lithography system.

Method and apparatus for elimination of bubbles in immersion medium in immersion lithography systems

Disclosed is a method of forming an integrated circuit line on a wafer using a lithographic technique. The method can include forming a photo resist line having a line width smaller than a desired line width of the integrated circuit line. The photo resist line can be reacted with a coating to form a mask line having a line width corresponding to the desired line width of the integrated circuit line and with a smaller line edge roughness (LER) than of the photo resist line.

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San Jose, CA, United States of America

Gilles Amblard