Samsung Electronics Co., Ltd.

Gil Ho Gu

Youn Gon Oh

Ho Chan Lee

Sae Yun Ko

Eun Hee Lee

Seong Pyo Hong

Ji Hun Kim

Dong Su Kim

Seong Sil Jeong

Sang Hyuk Park

Provided is a tray including a plate including a first region and a second region, a first groove on the first region of the plate and to which a stub is fixed, and a second groove on the second region of the plate and to which a grid holder is fixed, wherein the stub is configured to store test wafer pieces, and wherein the grid holder is configured to store a test sample.

Tray and destructive analysis automation apparatus including the same

Provided is an equipment front end module (EFEM) including a base configured to communicate with a processor, a tray port on the base, the tray port being configured to load a tray including a stub and a grid holder, a working robot configured to move in a direction on the base, and grasp and convey the stub in the tray and the grid holder in the tray, and a shuttle port on the base, the shuttle port including a first groove configured to fix the stub, and a second groove configured to fix the grid holder, wherein the working robot is further configured to convey the stub to the first groove and convey the grid holder to the second groove.

Equipment front end module and destructive analysis automation apparatus including the same

A substrate analysis apparatus is provided. The substrate analysis includes: an interlayer conveying module configured to transport a first FOUP; an exchange module which is connected to the interlayer conveying module, and configured to transfer a wafer from the first FOUP to a second FOUP; a pre-processing module configured to form a test wafer piece using the wafer inside the second FOUP; an analysis module configured to analyze the test wafer piece; and a transfer rail configured to transport the second FOUP containing the wafer and a tray containing the test wafer piece. The wafer includes a first identifier indicating information corresponding to the wafer, the test wafer piece includes a second identifier indicating information generated by the pre-processing module which corresponds to the test wafer piece, and the analysis module is configured to analyze the first identifier and the second identifier in connection with each other.

Substrate analysis apparatus and substrate analysis method

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Hwaseong-si, South Korea

Gil Ho Gu