Texas Instruments Corporation

Rf Magic, Inc.

Sdrf Eurl

Gianni Puccio

Biagio Bisanti

Stefano Cipriani

Francesco Coppola

Lorenzo Carpineto

Eric Duvivier

Martin Alderton

Rémi Artinian

Francois Marot

Vanessa Bedero

Lysiane Koechlin

Jean-Christophe Jiguet

Biagio Les Terrasses D'antibes Bat 1E Bisanti

Vanessa Bodrero

Francesco Villa Lilly Coppola

Stefano Res Monteverdi Cipriani

Eric Res Monceau Bat A1 Duvivier

Variable frequency oscillators allowing wide tuning range and low phase noise is disclosed. In an illustrative embodiment, a first transistor has a first terminal (e.g. collector) connected to a reference voltage, and a second terminal (e.g. emitter) connected to a first terminal of a first current source and to ground. The first transistor further has a third terminal connected to a first inductor and to a first capacitor connected to the emitter of the first transistor and also to a second capacitor connected to ground. A second transistor is similarly constructed. In order to achieve a variable frequency oscillation between the emitters of the two transistors, a variable tank capacitor is connected between the inductors, forming a circuit connecting in series all passive components composing the LC tank, masking most of parasitic capacitances.

Variable frequency oscillator having wide tuning range and low phase noise

Multi-loop PLL structure for generating an accurate and stable frequency over a wide range of frequencies

A tunable multiple frequency source system employing offset signal phasing includes a first frequency source, a phase delay element, and a second frequency source configured to operate concurrently with the first frequency source. The first frequency source includes an input coupled to receive a reference input signal and an output for providing a first frequency source signal. The phase delay includes an input coupled to receive the input reference signal, and an output, the phase delay element operable to apply a predefined phase delay to the input reference signal to produce a phase-delayed input signal. The second frequency source includes an input coupled to receive the phase-delayed input signal and an output for providing a second frequency source signal.

Offset signal phasing for a multiple frequency source system

A multiple frequency source system includes at least one frequency source tunable to a predefined target frequency, and at least one additional frequency source operable to generate a second signal at a frequency which is either higher or lower than the target frequency. A method for tuning the tunable frequency source to the target frequency during concurrent generation of the second signal includes (i) controlling the tunable frequency source to tune to at least one frequency point frequency lower than the target frequency, and thereafter controlling the oscillator to tune to the target frequency, when the second signal is higher in frequency than the target frequency, or (ii) controlling the tunable frequency source to tune to at least one frequency point higher than the target frequency, and thereafter controlling the tunable frequency source to tune to the target frequency, when the second signal is lower in frequency than the target frequency.

Multiple frequency source system and method of operation

A method for mitigating phase pulling in multiple frequency source system includes generating a first signal, the first signal referred to as an existing signal operating at an existing frequency point, the existing signal having a predefined pulling bandwidth around the existing frequency point. A request is received to generate a prospective signal at a prospective frequency point which is within the predefined pulling bandwidth of the existing signal. The prospective frequency is removed from within the predefined pulling bandwidth, and the prospective and existing signals are generated at the corresponding frequency points.

System and method for mitigating phase pulling in a multiple frequency source system

A tuning circuit uses a VCO with a trimming capacitor bank. The trimming capacitor bank is calibrated by logic to accommodate a desired frequency, f. A search renders an initial control word that is accurate within one LSB. In a first embodiment, comparisons between the desired frequency and the upper and lower frequency bounds of the VCO with the trimming capacitor bank configured by the initial control word. The control word may be increased or decreased based on the comparisons. In a second embodiment, differences between the desired frequency and the actual frequency of the VCO, with the trimming capacitor bank configured by the initial control word, are compared to a threshold. The control word may be increased or decreased based on the comparison.

High-speed, accurate trimming for electronically trimmed VCO

A phase lock loop circuithas a phase frequency detector, a charge pump, an active filterand a voltage-controlled oscillator. The phase detector generates UP and DN signals indicative of the relative frequency of F, a reference signal, and F, a signal controlled by the voltage-controlled oscillator. A charge pump using logic gates (bufferand inverter) to produce a voltage drop over resistorsandto generate a voltage at a node coupled to the input of transmission gateaccording to the values of the UP and DN signals. When the transmission gateis closed (low impedance) the charge pump may sink or source current to the inverting input of the operational amplifierof the active filter. When the transmission gate is open (high impedance state) the inverting input is electrically isolated from the node.

Charge pump phase locked loop

A phase lock loop circuit () has a phase frequency detector (), a charge pump (), an active filter () and a voltage-controlled oscillator (). The phase detector generates signals responsive to reference signal Fand VCO output signal F. A charge pump generates a voltage at the input of a first transmission gate () according to the values of the phase detector signals. A predetermined voltage is generated at the input of a second transmission gate (). When the transmission gates () are closed (low impedance) the charge pump may sink or source current to the inverting input of the operational amplifier () of the active filterand the predetermined voltage is applied to the non-inverting input. When the transmission gates are open (high impedance state) the inverting input is electrically isolated from the node and the non-inverting output is isolated from the power supply.

Charge pump phase locked loop with improved power supply rejection

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La Gaude, France

Gianni Puccio