Sgs-thomson Microelectronics S.r.l.

Stmicroelectronics S.r.l.

Gianluca Colli

Ernestina Chioffi

Alfredo Tomasini

Rinaldo Castello

Danilo Gerna

Massimo Franciotta

An integrated image processing system includes an array of cells arranged in rows and columns. Each cell corresponds to a pixel of an image and includes a photosensitive element for detecting the luminous intensity of its respective pixel and for generating a value. A first switch controls the transfer of the value from a respective photosensitive element to the corresponding capacitor, which stores the value. A second switch couples each of the cells in parallel to a common line. A control circuit receives the values from each cell on the common line and generates a signal for regulating the switching time interval of the first switch.

Adaptive optical sensor

A method and a respective circuit arrangement capable of markedly limiting the absorption of current by a current comparator circuit. The invention consists in limiting the absorption of current through the branch of the comparator circuit, along which is forced the highest current to the value of the lowest current, which is in turn forced through the other branch of the comparator circuit. This condition is obtained without interfering in any way with other characteristics of switching speed and sensitivity of the comparator circuit.

Current comparator with intrinsic limitation of absorption to the lowest

An analog multiplier circuit includes three transconductance stages. One of the transconductance stages, receiving a first differential voltage, conducts a differential current responsive to the first differential voltage from the other two transconductance stages. The differential current changes the transconductance in the other two transconductance stages, which are cross-coupled with one another. The second differential input voltage is presented to the other two transconductance stages in parallel, resulting in an output differential current or voltage based on the product of the first and second differential input voltages. Each of the transconductance stages is implemented in BiCMOS, and each includes two differential legs, each having a MOS transistor receiving an input signal and a cascode bipolar transistor. Each transconductance stage also includes a reference leg which develops the drain-source voltage for the MOS transistors; the first transconductance stage differentially varies this drain-source voltage in the other two stages to produce the product.

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Sannazzaro de'Burgondi, Italy

Gianluca Colli