Skhynix Inc.

Seoul National University

Gi-Moon Hong

Deog-Kyoon Jeong

Suhwan Kim

Taek-Sang Song

Kwan-Dong Kim

Han-Kyu Chi

Dae-Ho Yun

Seok-Min Ye

Ha-Jun Jeong

Su-hwan Kim

Woo-Rham Bae

Min-Seong Chu

A semiconductor device includes: an inversion circuit suitable for inverting a first data clock in response to an inversion signal; a first phase detection unit suitable for comparing a phase of the first data clock transferred from the inversion circuit with a phase of a system clock and generating a first detection result; a second phase detection unit suitable for comparing a phase of a second data clock with the phase of the system clock and generating a second detection result; an inversion signal generation unit suitable for generating the inversion signal that is enabled when the first detection result and the second detection result are different from each other; a first transferring unit suitable for transferring the first detection result; and a second transferring unit suitable for transferring the second detection result.

Semiconductor device

A data receiver includes a sampling clock generator configured to generate a sampling clock signal from an internal clock signal according to a data strobe signal, and a sampler configured to sample a data signal according to the sampling clock signal.

Data receiver

An integrated circuit includes a ring oscillator including delay cells having a delay value and configured to generate two or more periodic waves, a first phase controller configured to compare the phase of a first selected periodic wave to the phase of a reference wave and change the delay value of the delay cells from a first delay value to a second delay value based on a first comparison signal corresponding to a phase difference between the first selected periodic wave and the reference wave, and a second phase controller configured to compare the phase of a second selected periodic wave to the phase of the reference wave and restore the delay value of the delay cells from the second delay value to the first delay value based on a second comparison signal corresponding to a phase difference between the second selected periodic wave and the reference wave.

Integrated circuit with ring oscillator

A receiver includes a fixed delay unit configured to delay a first clock signal received from a clock channel by a predetermined time and output a second clock signal; a first delay unit configured to delay the first clock signal in response to a first control signal; a first data sampler configured to sample a data signal received from a data channel in response to an output signal of the first delay unit and output a first data signal; a second delay unit configured to delay the first data signal in response to a second control signal and output a second data signal; a second data sampler configured to sample the second data signal in response to the second clock signal; and a delay controller configured to output the first control signal and the second control signal.

Receiver, system including the same, and calibration method thereof

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Seoul, South Korea

Gi-Moon Hong