Samsung Electronics Co., Ltd.

Geun-Kyu Choi

Seung-hwan Lee

Yong-Suk Tak

Wan-don Kim

Kyu-Ho Cho

Oh-seong Kwon

Beom-Seok Kim

Jeong-Nam Han

Young-Sang Kim

Chang-Sun Hwang

Ji-Eun Lim

Suk-Hoon Jeong

Sang-Hak Lee

Tae-Young Kwon

Hyung-Kyu Jin

A method of controlling a chemical mechanical polishing (CMP) process, a temperature control, and a CMP apparatus, the method including measuring actual temperatures of at least two regions in a platen in real time during the CMP process in which a polishing pad attached to the platen polishes a substrate held by a polishing head using slurry and deionized water; receiving the measured actual temperatures of the regions; and individually controlling the actual temperatures of the regions in real time during the CMP process to provide the regions with a predetermined set CMP process temperature.

Method of controlling a temperature of a chemical mechanical polishing process, temperature control, and CMP apparatus including the temperature control

Provided is a semiconductor device including first, second and third source/drain regions. A first conductive plug in contact with the first source/drain regions, having a first width and a first height, and including a first material is provided. An interlayer insulating layer covering the first conductive plug and the substrate is disposed. A second conductive plug vertically penetrating the interlayer insulating layer to be in contact with the second source/drain regions, having a second width and a second height, and including a second material is provided. A third conductive plug vertically penetrating the interlayer insulating layer to be in contact with the third source/drain regions, having a third width and a third height, and including a third material is disposed. The second material includes a noble metal, a noble metal oxide or a perovskite-based conductive oxide.

Semiconductor device having metal plug and method of forming the same

A plurality of metal patterns are disposed on a substrate. A support structure is provided between the plurality of metal patterns. The support structure has a supporter and a glue layer. Each of the plurality of metal patterns has a greater vertical length than a horizontal length on the substrate when viewed from a cross-sectional view. The supporter has a band gap energy of at least 4.5 eV. The glue layer is in contact with the plurality of metal patterns. The supporter and the glue layer are formed of different materials.

Semiconductor device having glue layer and supporter

Growing community of inventors

Hwaseong-si, South Korea

Geun-Kyu Choi