Infineon Technologies Flash Gmbh & Co. Kg

Qimonda Flash Gmbh

Gert Koebernick

Detlev Richter

Konrad Seidel

Andreas Kux

Uwe Augustin

Juergen Engelhardt

Sudhindra Prasad

In accordance with embodiments of the invention, there are provided integrated circuits, memory controller, a method for determining a level for programming or erasing a memory segment, and a method for determining a wear level score for a memory segment. In an embodiment of the invention, a method for determining a level for programming or erasing a memory segment is provided, wherein a first level for programming or erasing a memory segment is determined as a function of an initial program/erase level. Furthermore, a first updated level is determined for a subsequent program/erase operation of the memory segment and a second level for programming or erasing the memory segment subsequent to programming or erasing the memory segment is determined using the first level, wherein the second level is determined as a function of the first updated level.

Integrated circuits, memory controller, and memory modules

A memory device () includes a memory array (). The memory array () has at least one memory area () that includes a plurality of conductive lines () and a plurality of memory cells () connected to the conductive lines (). The conductive lines () are arranged at positions (n) within the memory area (). The memory cells () are erasable and are programmable by application of an electrical programming pulse (P) supplied via a respective conductive line (). The memory device () is constructed such that for programming of a memory cell () an electrical programming pulse (P) is applied which has a programming pulse profile (PP) depending on the position (n) of a respective conductive line () to which the memory cell () is connected.

Memory device and method for operating a memory device

Growing community of inventors

Dresden, Germany

Gert Koebernick