U.S. Philips Corporation

Gerrit-Jan Hemink

Rutger C Wijburg

Jan Middelhoek

Roger Cuppens

Louis Praamsma

Each memory cell of an electrically-programmable semiconductor memory has a field-effect transistor with a charge-storage region. Efficient and fast injection of hot carriers into the charge-storage region is achieved by vertical punch-through of a depletion layer to a buried injector region, by application of programming voltages to a control gate and to the surface of the punch-through region. Non-injected carriers are removed via at least the transistor drain during the programming. A well-defined punch-through region can be obtained with a higher-doped boundary region at at least one side of the punch-through region to restrict the lateral spread of the depletion layer(s) and prevent parasitic connections. This permits closer spacing of the injector region to other regions of the memory cell, e.g. source and drain regions, and the injector region may adjoin an inset insulating field pattern. A compact cell array layout can be formed with a common connection region for the injector regions of two adjacent cells and for either a source or drain region of four other adjacent cells. The control gate and an erase gate may both be coupled in the same manner to the charge-storage region, and the cell can be operated with complementary voltage levels for writing and erasing. A feed-back mechanism with the start of injection from the punch-through and injector regions can provide a well-defined charge level limit for the erasure.

Electrically-programmable semiconductor memories with buried injector

An integrated circuit includes a memory having cells arranged in rows and columns, each cell having transistor being connected between two bit lines and having a current channel, a control gate and a charge-storage region therebetween, neighboring cells in a same row having a bit line contact in common, and control gates of transistors in a row being connected to a same word line, wherein each transistor has in a substrate of a first conductivity type a source region, a drain region and an injector region of a second conductivity type and mutually separated from each other, the injector regions of the transistors in a first row being controllable via the bit line contacts of the transistors in a second row adjacent to said first row. Preferably, at least one source region, at least one drain region and at least one injector region that are connected to a same bit line contact form a coherent region, e.g. a well, in the substrate. Preferably, the first and second row have the word line in common. The multiple use of bit line and word lines contribute to a dense memory.

Growing community of inventors

Enschede, Netherlands

Gerrit-Jan Hemink