Texas Instruments Corporation

Texas Instruments Incorporated Deutschland, Gmbh

Gerhard Thiele

Antonio Priego

Manuel Wiersch

Johann Erich Bayer

Erich Bayer

Kevin Scoones

Erich-Johann Bayer

Thomas Keller

Neil Gibson

Stefan Herzer

Franz Prexl

Stefan Reithmaier

Konrad Wagensohner

Anmol Sharma

Josy Bernard

In a circuit for DC-DC voltage converters, an amplifier has first and second inputs coupled to a reference voltage terminal and an output voltage terminal, respectively. A comparator has first and second inputs coupled to an amplifier output and a switching terminal, respectively. A logic circuit has inputs coupled to the comparator output and a clock terminal. A driver circuit has first and second inputs coupled to first and second logic outputs, respectively. A first transistor having a first control terminal coupled to the first driver output is coupled between a supply voltage terminal and the switching terminal. A second transistor is coupled between the switching terminal and a ground terminal, and has a second control terminal coupled to the second driver output. A threshold detection circuit is configured to provide a threshold signal responsive to a current through the second transistor crossing a current threshold.

Power-save mode for fixed-frequency DC-DC converter

An electrical system includes: 1) a buck converter; 2) a battery coupled to an input of the buck converter; and 3) a load coupled to an output of the buck converter. The buck converter includes a high-side switch, a low-side switch, and regulation loop circuitry coupled to the high-side switch and the low-side switch. The regulation loop circuitry includes: 1) a main comparator; 2) a bias current source coupled to the main comparator and configured to provide a bias current to the main comparator; and 3) a dynamic biasing circuit coupled to the main comparator and configured to add a supplemental bias current to the bias current in 100% mode of the buck converter. The supplemental bias current varies depending on an input voltage (VIN) and an output voltage (VOUT) of the buck converter.

Dynamic biasing circuit for main comparator to improve load-transient and line-transient performance of buck converter in 100% mode

A switching converter circuit includes a voltage regulation loop configured to provide an output voltage (VOUT) based on an input voltage (VIN). The switching converter circuit also includes a 100% mode circuitry coupled to the voltage regulation loop, wherein the 100% mode circuitry is configured to apply an offset to VOUT in response to detecting that VIN is approaching VOUT.

Low quiescent current buck converter with direct feedback

A circuit includes a first power converter having a first voltage input and a first output. The circuit also includes a second power converter having a second voltage input coupled to the first voltage input, a clock input, and a second output. A phase shifter is coupled between the first output and the clock input of the second power converter.

Daisy chain clock distribution system

A switching converter circuit includes a hysteretic comparator with a reference voltage (VREF) node and a feedback node. The switching converter circuit also includes a switchable error amplifier circuit coupled to the feedback node of the hysteretic comparator. The switchable error amplifier circuit includes an error amplifier that is coupled to the feedback node during a power-save mode and that is decoupled from the feedback node during a deep power-save mode initiated in response to a duration of the power-save mode being greater than a time threshold.

Ultra-low Iq buck converter with switchable error amplifier

A power converter includes a watchdog circuit having an input adapted to be coupled to a pause signal of a switching power supply. The watchdog circuit is configured to provide a start signal at an output thereof based on the pause signal indicating that the power converter has stopped switching for a threshold duration that is less than an audible range. A pulse generator circuit has an input coupled to the output of the watchdog circuit and is configured to generate at least one pulse based on the start signal. A switch circuit has an input terminal adapted to be coupled to an input voltage and at least one other terminal adapted to be coupled to an inductor. The switch circuit is configured to provide negative current from an output of the power converter through the at least one other terminal based on the at least one pulse.

Out of audio switching for power supply

An electrical system includes: 1) a buck converter; 2) a battery coupled to an input of the buck converter; and 3) a load coupled to an output of the buck converter. The buck converter includes a high-side switch, a low-side switch, and regulation loop circuitry coupled to the high-side switch and the low-side switch. The regulation loop circuitry includes a comparator with preamplifier gain adjustment circuitry configured to adjust a preamplifier gain of the comparator based on an overdrive voltage.

Comparator with preamplifier gain adjustment based on overdrive voltage

An integrated circuit comprising: a high-side pMOSFET comprising a drain and a gate; a node coupled to the drain of the high-side pMOSFET; a voltage-to-current circuit comprising a first nMOSFET and a first resistor, the first nMOSFET comprising a gate and a source, the first resistor comprising a terminal coupled to the source of the first nMOSFET; an error amplifier comprising an output port coupled to the gate of the first nMOSFET; a skip clamp nMOSFET comprising a source coupled to the output port of the error amplifier; and a current limit clamp pMOSFET comprising a source coupled to the output port of the error amplifier.

Integrated circuits with current limit clamps and skip clamps for power converters

A device includes a first transistor coupled to a ground node and a current source. The first transistor includes a control terminal coupled to a reference voltage source, where the current source is coupled to an input voltage source. The device includes a second transistor coupled to the input voltage source, where the second transistor includes a control terminal coupled to the first transistor. The device includes a third transistor coupled to the second transistor, where the third transistor includes a control terminal coupled to an output voltage node. The device includes a fourth transistor coupled to the third transistor, where the fourth transistor includes a control terminal coupled to the output voltage node. The device includes a fifth transistor coupled to the fourth transistor and a resistor, where the fifth transistor includes a control terminal coupled to the fourth transistor. The resistor is coupled to the ground node.

Detection of low output voltages for power converters

A DCDC converter includes a transconductance amplifier, a comparator, a current driving component, an output impedance, a switch, a clamp resistor and a p-channel FET. The transconductance amplifier outputs a transconductance current and a switch control signal. The comparator has a two n-channel FET inputs forming a differential pair and outputs a compared signal. The current driving component generates an output current based on the compared signal. The output impedance component generates an output DC voltage based on the output current. The switch is between the two n-channel FETs and can open and close based on the switch control signal. The clamp resistor is arranged in series with the switch. The p-channel FET is in series with the clamp resistor and is controlled by the output DC voltage.

Startup clamp circuit for non-complimentary differential pair in DCDC converter system

The invention relates to an electronic device and a method for DC-DC conversion using a comparator for generating an output signal for driving a power switch of a switch mode DC-DC converter. The electronic device is configured to reduce a bias current of the comparator with a first slope in response to a decreasing load and to increase the bias current of the comparator with a second slope in response to an increasing load, wherein the second slope is steeper than the first slope.

Electronic device and method for DC-DC conversion with variable bias current

A DC-DC converter has high-side power and low-side power transistors connected in series between supply terminals, an inductor connected between the power transistors and an output terminal. A comparator compares the output voltage with a reference voltage. A detector detects when inductor current approaches zero. A timer is configured to determine a minimum ON time of the high-side power transistor optimized for a particular value inductor. A current detector detects current flow in the back-gate diode of the low-side power transistor. timer is configured to determine an overriding ON time in response to the back-gate current detector. Logic provides control signals to gate power transistors in response to the comparator and the longer one of the minimum ON time and the overriding ON time. The minimum ON time for the high-side power transistor is adjusted in response to the actual inductance of the inductor.

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Dachau, Germany

Gerhard Thiele