Mediatek Singapore Pte. Ltd.

Gerhard Mitteregger

Stacy Ho

Nathan Egan

Boyi Zheng

A digital to analog (DAC) circuit that performs least significant bit (LSB) dithering comprises: a first DAC; an auxiliary code generator configured to produce an auxiliary code; an auxiliary DAC configured to receive the auxiliary code and convert the auxiliary code into an analog version of the auxiliary code; and summing circuitry to dither LSBs of the first DAC with the auxiliary code. The auxiliary code generator is configured to update the auxiliary code at a rate less than a sampling rate of the DAC circuit, the auxiliary code has a smaller range than that of a range of binary-weighted LSBs of the main DAC and/or the auxiliary code generator is configured to produce the auxiliary code as a predetermined repeating sequence.

LSB dithering for segmented DACs

Radio-frequency (RF) receivers having bandpass sigma-delta analog sigma analog-to-digital converters (ADC) designed to digitize signals in the RF domain are described. Such bandpass ADCs utilize one or more of the following techniques to enhance noise immunity and reduce power consumption: generation of in-phase (I) and quadrature (Q) paths in the digital domain, norder resonant bandpass filtering with n&#x3e;1, and signal sub-sampling in an iNyquist zone with i&#x3e;1. Compared to RF receivers in which the I and Q paths are generated in the analog domain, these RF receivers exhibit higher IRRs because they are not susceptible to in-phase/quadrature (IQ) mismatch. Using norder resonant bandpass filtering with n&#x3e;1 attenuates unwanted image tones. The bandpass ADC-based RF receivers described herein exhibit enhanced immunity to noise, achieving for example image rejection ratios (IRR) in excess of 95 dB.

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San Jose, CA, United States of America

Gerhard Mitteregger