Infineon Technologies Ag

Gerhard M&uuml;ller

Dietmar Gogl

Heinz H&ouml;nigschmid

Till Schl&ouml;sser

Stefan Lammers

Thomas R&ouml;hr

Thomas B&ouml;hm

An integrated memory with a configuration of non-volatile memory cells based on ferromagnetic storage contains both powerful memory cells with a magnetoresistive effect with a transistor control and cost-effective memory cells with a magnetoresistive effect with memory elements connected between the word lines and bit lines. The memory elements connected directly between the bit line and the word line are preferably inserted in memory cell arrays that can be stacked one above the other above the memory cells with the transistor, and thereby achieve a high integration density. The fact that the memory, which contains both types and thereby satisfies all the system requirements, is fabricated in one module and in one process sequence considerably lowers the fabrication costs.

Integrated memory with a configuration of non-volatile memory cells and method for fabricating and for operating the integrated memory

The MRAM semiconductor memory configuration has MRAM main cell arrays in the form of a crosspoint array or a transistor array together with redundant MRAM cell arrays formed of redundant MRAM memory cells arranged in a plurality of planes and provided on the same chip. The redundant MRAM cell arrays are distributed over the individual planes of the memory matrix or one plane of the memory array is used in its entirety for providing redundant cell arrays.

MRAM semiconductor memory configuration with redundant cell arrays

The data memory has a plurality of banks, each with a multiplicity of memory cells that form a matrix of rows and columns with respectively assigned matrix row lines and column lines. The banks are arranged spatially one on top of the other as stacks, with the stack edges that are parallel to the matrix rows and at which the ends of the column lines that are connected to a respective column-driving device are located, lie in a common plane. The common plane extends in the direction of the matrix rows and is substantially orthogonal with respect to the direction of the columns. The column-driving devices of all the banks are arranged directly adjacent to one another as a block in the direction of the columns, on or near the same edge of the bank stack. The banks preferably contain memory cells which can be read out without damage, and in each case a plurality of column lines are each assigned to one common sense amplifier in the column-driving device of each bank.

Data memory with a plurality of memory banks

A current driver configuration for MRAMs includes word-line drivers and bit-line drivers at respective first ends of word lines and bit lines. The word line drivers and the bit line drivers each include a series circuit formed by an n-channel field-effect transistor and a current source. Further series circuits are provided at the respective second ends of the word lines and the bit lines. Each of the further series circuits includes a second n-channel field-effect transistor and a voltage source.

Growing community of inventors

Meitingen, Germany

Gerhard Müller

Growing community of inventors

Meitingen, Germany

Gerhard M&uuml;ller

Gerhard Müller