Infineon Technologies Ag

Infineon Technologies Austria Ag

Gerhard Maderbacher

Stefano Marsili

Werner Hoellinger

Peter Bogner

Herwig Wappis

Christoph Sandner

Mario Motz

Kennith Kin Leong

Peter Singerl

Martin Mataln

Luca Bizjak

Clemens Roessler

Volha Kharko Subotskaya

Roman Riederer

Kyrylo Cherniak

Stylianos Perissakis

Michael Sieberer

A circuit for biasing a transistor is provided. The circuit includes an output terminal configured to be coupled to a gate terminal of the transistor and circuitry. In a first state, the circuitry is configured to output a control signal at a first voltage level for setting the transistor to a first transistor state. In a second state, the circuitry is configured to first output the control signal at a second voltage level different from the first voltage level following by changing the control signal from the second voltage level towards a third voltage level different from the first and second voltage level over time.

Circuit and method for biasing a transistor and corresponding device

A device for controlling trapped ions includes an ion trap, a plurality of field electrodes configured to control ions in the ion trap, and a controller chip. The controller chip includes at least one delta-sigma digital to analog converter (DS-DAC) module including a DS-DAC circuit configured to receive a digital data stream, convert the digital data stream to analog control voltages, and supply the analog control voltages to the field electrodes.

Device for controlling trapped ions and including a delta/sigma dac module

A semiconductor device includes: a semiconductor body having an active region and a substrate region beneath the active region; a bidirectional switch having first and second gate structures configured to control a conductive state of a channel in the active region, and first and second input-output terminals electrically connected to the channel; and a passive discharge circuit in parallel with the bidirectional switch and configured to utilize a fraction of a voltage across the first and second input-output terminals to switch on a transistor device that electrically connects the substrate region to the input-output terminal at the lower potential during an off-state of the bidirectional switch and during ZVS (zero-voltage switching) transition periods.

Passive discharge circuit for bidirectional semiconductor switches

A circuit for processing an input-signal voltage, and including an input capacitance coupled between an input node of the circuit and a sense node of a comparator; a reference capacitance coupled to the sense node of the comparator; and a common mode switch coupled between the sense node and a reference node of the comparator. The circuit is configured to have the input capacitance set to a reference input voltage while the common mode switch is closed, and the input node set to the input-signal voltage while the common mode switch is open. The reference capacitance includes a plurality of capacitances, at least one of which is provided as a switched capacitance that is selectively controllable to configure the plurality of capacitances. A switched capacitance controller is configured to control the switched capacitance so as to compensate, at the sense node, a comparator offset voltage.

Circuit for processing an input-signal voltage

Representative implementations of devices and techniques may minimize switching losses and voltage ripple in a switched capacitor de-de converter. A digital controller is used to control switching, based on an existing load. In some examples, the digital controller may insert a dead-time phase in a switching period, which may reduce voltage ripple for a low output load current. In other examples, the digital controller may adjust the conductance of a plurality of sub-switches, where the plurality of sub-switches may include one or more sub-switches that have a higher on-resistance than other sub-switches. For example, a sub-switch may have an on-resistance that is a multiple of the on-resistance of other sub-switches.

Digital controller for switched capacitor DC-DC converter

A circuit for processing an input-signal voltage comprises a first comparator comprising a first-comparator sense node and a reference capacitance that is coupled to the first-comparator sense node, a second comparator comprising a second-comparator sense node, and a comparator select switch coupled between a path input terminal of the circuit and the first-comparator sense node and the second-comparator sense node. A method of processing at least one input-signal voltage using at least one associated threshold voltage in a circuit, wherein a plurality of comparators comprises more comparators than there are path input terminals coupled to path output terminals, comprises selectively making a coupling via one comparator of two comparators provided in parallel to form a coupling path from the path input terminal to an associated path output terminal, while breaking the coupling via the other comparator.

Apparatus and method for processing an input-signal voltage

A circuit for processing an input-signal voltage comprises an input capacitance coupled between an input node of the circuit and a sense node of a comparator and a reference capacitance coupled to the sense node of the comparator. A method for processing an input-signal voltage comprises configuring a reference capacitance coupled to an input capacitance; during a charge phase, charging the reference capacitance to a first-level reference voltage; and, during an operative phase, setting the input capacitance to an input-signal voltage to obtain, at the sense node, a sense voltage.

Representative implementations of techniques and/or devices provide control of switching characteristics in a switched capacitor dc-dc converter. In various implementations, the switching characteristics are modified based on load characteristics (e.g., magnitude of the load current). The switching characteristics may be modified to reduce, minimize, or eliminate switching losses in the dc-dc converter.

Representative implementations of devices and techniques minimize switching losses in a switched capacitor dc-dc converter. The slope of the charging and/or discharging phase may be modified, smoothing the transitions from charge to discharge and/or discharge to charge of the switched capacitor.

Digital slope control for switched capacitor dc-dc converter

Representative implementations of devices and techniques determine the timing of switches associated with a dc-dc converter. The determination is based on a body diode conduction of at least one of the switches, which is detected and used to determine a switching delay.

Dead-time optimization of DC-DC converters

Various apparatuses and methods are described where a signal is amplified using a chopper amplifier arrangement, and ripples caused by said chopper amplifier arrangement are reduced. In some cases, this reduction of ripples is performed by controlling a voltage offset of an amplifier of said chopper amplifier arrangement. In other embodiments, a detection of ripples or a chopping of the chopper amplifier arrangement is at least temporarily disabled.

Chopper amplifier

In accordance with an embodiment, a controller for a switched mode power supply includes an average current comparator that determines whether an average current within the switched mode power supply is below a current threshold, and a switch signal generation circuit coupled to the average current comparator having switch signal outputs configured to be coupled to a switching circuit of the switched mode power supply. The switch signal generation circuit produces a first switching pattern in a first mode of operation and produces a second switching pattern a second mode of operation. When the average current comparator determines that the average current is below the current threshold, the switch signal generation circuit is operated in a first mode, and when the average current comparator determines that the average current is not below the current threshold, the switch signal generation circuit is operated in a second mode.

System and method for controlling a power supply during discontinuous conduction mode

A method and apparatus for regulating a dc-dc converter wherein a plurality of switches are arranged with respect to an energy storage device and an output capacitor. An impedance of one or more of the plurality of switches may be adjusted by altering a non-zero voltage provided to the one or more of the plurality of switches, the altering may be based on a slope control signal output by a multiplexer that receives a signal representing a conductance value of the one or more of the plurality of switches.

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Gleisdorf, Austria

Gerhard Maderbacher