Siemens Aktiengesellschaft

Gerhard Dorda

Doris Schmitt-Landsiedel

Ignaz Eisele

Erwin P Jacobs

An integrated JK-flipflop circuit comprises two cross-coupled inverters formed by a transistor and a resistor element connected in series therewith. Additional logic elements connect inputs of the flipflop to the cross-coupled inverters. It is a goal to provide the flipflop circuit on the smallest possible semiconductor area. This is achieved since the transistors of the inverters are designed as hot electron transistors, whereby each of these transistors is combined with one of the additional logic elements provided as a field effect transistor to form a common component which assumes two transistor functions but only requires the area of one field effect transistor.

Integrated JK-flipflop circuit including hot-electron transistors

An integrated RS flip-flop circuit comprises two cross-coupled inverters which respectively consist of a field effect transistor and a resistor connected in series. Each field effect transistor is connected to an additional logic element whose control input represents the R or the S input, respectively. Realization of a flip-flop circuit on the smallest possible semiconductor is achieved by designing the additional logic elements as hot electron transistors, each of which is combined with one of the field effect transistors to form a common component which assumes two transistor functions but only requires the area of one field effect transistor. The invention is particularly useful in VLSI circuits.

Integrated RS flip-flop circuit

A static storage cell is formed of two cross-coupled inverters each containing a field effect transistor and a resistor element connected in series therewith. Each circuit node is thus connected via an additional logic element to a bit line allocated thereto. A storage cell is provided which is on as small as possible a semiconductor area and has a short access time. This is achieved by designing the additional logic elements as hot electron transistors which are respectively combined with one of the field effect transistors to form a common component which only requires the area of a field effect transistor. The cell is useful in VLSI semiconductor memories.

Static storage cell

A field effect transistor includes a semiconductor substrate of a first conductivity having a source zone and a drain zone of an opposite, second conductivity spaced apart therein and extending to the surface thereof. A surface channel adjoins the surface, is of the second conductivity, and extends in an area located between the source and drain zones. A gate electrode is carried above the surface channel, either on an insulator, or directly on the surface to form a Schottky junction. A second zone lies beneath the surface below or in overlapping relation to the surface channel and extends between the drain and source zones. The second channel is doped with dopant particles whose energy level in the forbidden band of the semiconductor substrate, at an operating temperature T, lies at a distance of more than 1/2 kT from the conduction band edge and valence band edge of the semiconductor substrate. Application of proper potentials with respect to the start voltage required for ionization of the dopant particles in the second channel causes the field effect transistor to function as a high-speed switch. Connection of the field effect transistor in series with a resistance between the poles of a power supply which has a voltage greater than the start voltage causes the field effect transistor to operate, in combination with the resistor, as an oscillator.

Field effect transistor having a surface channel and its method of

A static storage element in a field effect transistor arrangement, has source and drain zones in a semiconductor body and a gate insulation layer provided on the surface of the semiconductor body. A spatial region having a high lattice defect or trap density is formed in the gate insulation layer for storing a quantity of charge which can be altered by electromagnetic radiation.

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Munich, Germany

Gerhard Dorda