Sgs-thomson Microelectronics S.a.

Gerard Le Roux

Jacques Le Menn

Michel Barou

A reference diode is formed in an N-type insulated well. An avalanche diode includes a P-type deep region having a high doping level, beneath which is formed an N-type overlapping buried layer, a P-type deep diffused region contacting a central portion of the deep region, a second, P-type, deep diffused region contacting the periphery of the deep region, an N-type highly doped surface region coating the surface of the first deep diffused region and forming therewith an avalanche junction. At least another structure identical to the avalanche diode structure, without the N-type surface region, forms a resistor between its electrodes.

Avalanche diode incorporated in a bipolar integrated circuit

Avalance diode incorporated in a bipolar integrated circuit

In a circuit comprising a power MOS transistor (MP) connected to an inductive load (L), the gate (GP) of the power MOS transistor is connected, on the one hand, to a voltage booster circuit (3) and, on the other hand, to the drain (DL) of a logic MOS transistor (ML). A control circuit (56) fed by the supply source has an output (63) connected to the gate (GL) of the logic MOS transistor. Means are provided for limiting the source voltage of the logic MOS transistor to a voltage lower than the supply voltage (VCC) minus a predetermined threshold voltage when the power MOS transistor is conductive. The control circuit is then capable of controlling the switching of the logic MOS transistor with the supply voltage available at the supply source.

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Sappey-En-Chartreuse, France

Gerard Le Roux