Zoran Corporation

Teralogic, Inc.

Csr Technology Inc.

Gerard K Yeh

David R Auld

Bruce Holmer

Peter Trajmar

Hong-Jyeh Jason Huang

C Dardy Chang

Ravi Kiran Manyam

Anoush Khazeni

Meng-Day Yu

Viet Nguyen

Hsiang O-Yang

Nishit Kumar

Joseph Cesana

Zeljko Markovic

Kevin P Acken

Cheng-ping Dardy Chang

Meng-Day (Mandel) Yu

Jackson F Lee

Xianliang Zha

According to one embodiment, a graphics/video processor includes a memory controller. The memory controller includes a first arbiter that receives memory client requests to access a memory device, and a first memory buffer coupled to the first arbiter. The first arbiter stores client requests that are selected by the first arbiter. The memory controller also includes a second arbiter coupled to the first memory buffer and a second memory buffer coupled to the second arbiter. The second arbiter receives requests from the memory client requests stored in the first memory buffer. The second memory buffer stores the client requests selected by the second arbiter. Further, the memory controller includes a third arbiter coupled to the second memory buffer. The third arbiter provides access of the memory device to the client requests stored in the second memory buffer.

Interactive set-top box having a unified memory architecture

A method, apparatus, system and machine-readable medium for generating a composite output image based upon multiple input images. In certain embodiments, a plurality of input graphics images are iteratively blended in real time to provide a blended graphics image, which is then composited with other layers such as an input video image. The composite output image may then be provided to a display device. Iterative blending of the plurality of graphics images may include scaling, format conversion, and color space conversion, and may be performed based on priority information received for the graphics images from content sources. Compositing may include an alpha blending based on alpha values for pixels of the images.

Method and apparatus for processing video and graphics data to create a composite output image having independent and separate layers of video and graphics display planes

A method and apparatus for providing a single-chip digital multimedia receiver for multi-channel/multi-tuner rendering comprising receiving multiple independently encoded input streams on a system-on-a-chip, and independently locking each video output to a corresponding input channel, to ensure that each video and audio output has a clock matched to an encoder clock.

Robust multi-tuner/multi-channel audio/video rendering on a single-chip high-definition digital multimedia receiver

A method and apparatus for providing a high definition capture engine comprising an on-the-fly scaler to perform horizontal and vertical scaling as needed, prior to storage of the data in a buffer.

Method and apparatus for high definition capture

A unified memory controller (UMC) is disclosed. The UMC may be used in a digital television (DTV) receiver. The UMC allows the DTV receiver to use a unified memory. The UMC accepts memory requests from various clients, and determines which requests should receive priority access to the unified memory.

Unified memory controller

A method, apparatus, system and machine-readable medium for generating a composite output image based upon multiple input images. In one embodiment, a first display location on a display panel is located. A first function is performed to generate a first pixel of the output image for display at the first display location if a first image and a second image are both active at the first display location. A second function is performed to generate the first pixel of the output image if only the first image or only the second image is active at the first display location. In one embodiment, the first image is active at the first display location if the first display location is located within a first display area on the display panel where the first image is to be displayed, the second image is active at the first display location if the first display location is located within a second display area on the display panel where the second image is to be displayed.

Method and apparatus for processing video and graphics data to create a composite output image having independent and separate layers of video and graphics

A method and apparatus for providing a technique to transfer two digital video signals synchronously across a bus sharing the same pixel clock and data bus.

Method and apparatus for video capture

A method and an apparatus for an integrated high definition television controller are described. The integrated high definition digital television controller includes two or more the following functions in a single chip: MPEG2 Transport, Audio and Video Decoders, Video input capture and converter, flexible video scan rate converter, de-interlace processor, display controller and video D/A converters, graphics controller, a unified local bus, N-plane alpha blending, a warping engine, audio digital signal processor, disk drive interface, peripheral bus interfaces, such as PCI bus and local bus interfaces, various I/O peripherals, a bus bridge with a partitioned chip, and a CPU with caches. The integrated controller, in one embodiment, is designed to handle multiple television standards (for example ATSC, ARIB, DVB, AES, SMPTE, ITU) and designed to be deployed in various countries in the world.

Method and apparatus for an integrated high definition television controller

The present invention is a method and apparatus to generate an anti-flickered pixel from a source pixel having a source pixel value in a display memory. The apparatus comprises a plurality of storage elements, a filter, a comparator, and an output selector. The plurality of storage elements store a sequence of pixels in the display memory which includes the source pixel. The filter is coupled to the plurality of storage elements to filter the sequence of pixels. The filter generates a filtered pixel corresponding to the source pixel. The comparator is coupled to the plurality of storage elements to compare the source pixel value with a threshold value. The comparator generates a comparison result. The output selector is coupled to the filter and the storage elements to select one of the source and filtered pixels according to the comparison result. The selected one of the source and filtered pixels is the anti-flickered pixel.

Anti-flickering for video display based on pixel luminance

The present invention is a method and apparatus for de-interlacing image data in a memory. A read interface circuit is coupled to the memory to transfer a patch of the image data from the memory to a buffer. A de-interlacing circuit is coupled to the read interface circuit to de-interlace the image data in the patch from the buffer. A receive circuit is coupled to the de-interlacing circuit to re-organize the de-interlaced image data.

De-interlacing video images using patch-based processing

The present invention is a method and apparatus for correcting aspect ratio of a display by scaling a source array of pixel data in a memory by a scale factor to a destination array of pixel data. The apparatus comprises a coefficient unit, a register unit, and an arithmetic unit. The coefficient unit is coupled to a buffer to load N coefficients. The register unit is coupled to the source array to load N pixel data synchronously with the coefficient unit. The N pixel data are started at a location in the source array according to the scale factor. The arithmetic unit is coupled to the coefficient unit and the register unit to perform a filtering operation on the loaded N pixel data using the corresponding N coefficients. The arithmetic unit generates a filtered output corresponding to a scaled pixel in the destination array.

Growing community of inventors

Redwood City, CA, United States of America

Gerard K Yeh