International Business Machines Corporation

Globalfoundries Inc.

Lenovo (singapore) Pte. Ltd.

Gerald Keith Bartley

Darryl John Becker

Philip Raymond Germann

Mark Owen Maxson

Paul Eric Dahlen

Andrew Benson Maki

Matthew Stephen Doyle

John Michael Borkenhagen

Mark James Jeanson

William Paul Hovis

John Edward Sheets, Ii

Charles Luther Johnson

Joseph Paul Kuczynski

Russell Dean Hoover

Trevor Joseph Timpane

Steven Paul VanderWiel

Daniel Paul Kolz

Timothy Jerome Tofil

Paul William Rudrud

David R Motschman

Richard Boyd Ericson

John Richard Dangler

Roy Rongqing Yu

David Paul Paulsen

Todd Alan Christensen

Thomas Anthony Wassick

James Anthony Marcella

Robert Allen Drehmel

Patrick Ronald Varekamp

Arthur Gilman Merryman

Wesley David Martin

Kurt A Smith

Peter A Franklin

John R Pennacchia

Carmine J Mele

Thomas A Wayson

John E Kelly, Iii

Arvind Kumar Sinha

Kevin Albert Splittstoesser

David J Braun

Thomas Donald Kidd

William Hugh Cochran

Douglas A Baska

Benjamin W Mashak

Ay Vang

David Clifford Long

Eric J Campbell

Mark Kenneth Hoffmeyer

Kamal Kumar Sikka

James A Busby

Michael J Fisher

David Otto Lewis

Charles D Johnson

Matthew Allen Butterbaugh

Xiaojin Wei

Sukhvinder Singh Kang

George Russell Zettles, Iv

Wayne Melvin Barrett

James D Bielick

Arthur J Higby

Delbert Raymond Cecchi

Edward N Cohen

Jamil A Wakil

Jiantao Zheng

Dennis Martin Rickert

Carl-Otto Nilsen

Kenneth Claude Hinz

Mark M Thornton

Glenn W Sellers

Linda S Herman

Jeffrey A Collett

Timothy A Tofil

A method, printed circuit board assembly (PCBA), and device comprising a PCBA are disclosed. The method includes obtaining a material comprising silver halide grains, incorporating the material into a PCBA having at least one component in contact with the material, detecting a variation in electrical properties of the at least one component that is above a threshold variation and, in response, enacting a data protection response. The PCBA includes a material comprising silver halide grains, at least one component in contact with the material, and a monitoring component. The monitoring component is configured to detect a variation in electrical properties of the at least one component that is above a threshold variation and, in response, enact a data protection response.

X-ray sensitive materials for data protection

An inductor structure is provided that is positioned within a via of a printed circuit board. The inductor structure includes a via extending through a printed circuit board. The inductor structure includes at least one coil of an electrically conductive material beginning at a first opening to the via continuously present on a sidewall of the via encircling a center of the via extending to a second opening of the via opposite the first opening of the via. It further includes at least electrode present in contact with an end of the coil at said first or second opening.

Creating inductors, resistors, capacitors and other structures in printed circuit board vias with light pipe technology

A printed circuit (PC) card apparatus can, in an absence of external power provided to a Peripheral Component Interconnect Express (PCIe) PC card, prevent and detect unauthorized access to secure data stored on a memory device mounted on the PCIe PC card. The PCIe card includes a primary battery to supply, when external power is disconnected from the PCIe card, power to an electronic security device mounted on the PCIe card. The PC card apparatus also includes a PCIe edge connector protector enclosing electrically conductive fingers of a PCIe edge card connector. The PCIe edge connector protector includes a hidden supplemental charge storage device integrated into the PCIe edge connector protector. The PCIe edge connector protector also includes electrically conductive contacts to transfer supplemental power from the supplemental charge storage device to the electronic security device.

Secure hardware threat protection

A method of attaching an integrated circuit (IC) package to a printed circuit board (PCB) with a set of direct current (DC) blocking capacitors includes: applying a conductive attachment material to a first set of attachment pads located on a first planar surface of the IC package; aligning the set of DC blocking capacitors in accordance with corresponding positions of the first set of attachment pads; attaching the set of DC blocking capacitors to the IC package by: positioning the aligned set of DC blocking capacitors so that a first surface of a first DC blocking capacitor of the set of DC blocking capacitors is adjacent to a corresponding attachment pad of the first set of attachment pads; and connecting the conductive attachment material to the IC package and to the first surface of the first DC blocking capacitor to create an IC package assembly.

Direct current blocking capacitors and method of attaching an IC package to a PCB

An electronic system can be used to monitor temperature. The electronic system can include a characterized dielectric located adjacent to a plurality of heat-producing electronic devices. The electronic system can also include a leakage measurement circuit that is electrically connected to the characterized dielectric. The leakage measurement circuit can be configured to measure current leakage through the characterized dielectric. The leakage measurement circuit can also be configured to convert a leakage current measurement into a corresponding output voltage. A response device, electrically connected to the leakage measurement circuit can be configured to, in response to the output voltage exceeding a voltage threshold corresponding to a known temperature, initiate a response action.

Leakage characterization for electronic circuit temperature monitoring

Disclosed aspects relate to connector structures and a card. A first connector structure is to join a first subset of a set of electrical connections. A second connector structure is to join a second subset of the set of electrical connections. The card manages the set of electrical connections and is located between the first and second connector structures to connect with the first and second connector structures.

Electrical connection management using a card

An interconnect device may include a first center conductor of a first material that has a first durometer. The first center conductor may be surrounded by a first inner dielectric ring, which may be surrounded by a conductive region of a second material having a second durometer. The second durometer may be different from the first durometer. The conductive region may have a first end that defines a first plane and a second end that defines a second plane. An outer dielectric ring may surround the conductive region. The first center conductor may have a first bulb and a second bulb, the first bulb may extend in a direction away from the second plane and beyond the first plane, and the second bulb may extend in a direction away from the first plane and beyond the second plane.

Chip interconnect devices

An optical electromagnetic radiation (EM) emitter and receiver are located upon a printed circuit board (PCB) glass security layer. A predetermined reference flux or interference pattern, respectively, is an expected flux or reflection pattern of EM emitted from the EM emitter, transmitted by the glass security layer, and received by the EM receiver. When the PCB is subject to an unauthorized access thereof the optical EM transmitted by glass security layer is altered. An optical monitoring device that monitors the flux or interference pattern of the optical EM received by the EM receiver detects a change in flux or interference pattern, in relation to the reference flux or reference interference pattern, respectively, and passes a tamper signal to one or more computer system devices to respond to the unauthorized access. For example, one or more cryptographic adapter card or computer system functions or secured crypto components may be disabled.

Secure crypto module including optical glass security layer

A security matrix layer between a first and second conductive shorting layers are located within a printed circuit board (PCB). The security matrix layer includes at least two types of microcapsules with each type of microcapsule containing a different reactant. When the security matrix layer is accessed, drilled, or otherwise damaged, the microcapsules rupture and the reactants react to form at least an electrically conductive material. The electrically conductive material may contact and short the first and second conductive shorting layers.

Secure crypto module including electrical shorting security layers

Disclosed is a device for detecting non-intrusive inspections. The device includes an electrical component with a first end cap and a second end cap. Additionally, the device includes an x-ray sensitive material electrically coupling the first end cap and the second end cap. The x-ray sensitive material has a first state having a first conductivity and a second state having a second conductivity. The sensing material is configured to transform from the first state to the second state when exposed to an initiating voltage.

X-ray sensitive device to detect an inspection

A direct current (DC) blocking capacitor can be used with an integrated circuit (IC) package. The DC blocking capacitor can include a first electrically conductive planar surface having a first area and a second electrically conductive planar surface having a second area greater than the first area. The second planar surface is in a parallel planar orientation to the first planar surface. The DC blocking capacitor can also include a first set of electrically conductive plates electrically connected to the first planar surface and a second set of electrically conductive plates electrically connected to the second planar surface. The second set of electrically conductive plates is interleaved with and electrically insulated from the first set of electrically conductive plates by a dielectric material.

Direct current blocking capacitors

Creating in-via routing with a light pipe is disclosed. A resist layer is applied over a layer of conductive material provided in a via. A light pipe is inserted into the via. The surface of the light pipe includes at least one masked portion and at least one unmasked portion. A portion of the resist layer is exposed with light emitted from the unmasked portions of the light pipe. Portions of the conductive layer corresponding to the exposed portion of the resist layer are then removed to create the in-via routing.

Creating in-via routing with a light pipe

A method for forming passive electrical devices that includes depositing a photo reactive layer over a sidewall of a via that extends through a printed circuit board; inserting a light pipe having a mask configured to provide a passive electronic device geometry within the via to an entire depth of the via; and exposing the photo reactive layer to radiation provided by the light pipe to provide a pattern having the passive electronic device geometry on the sidewall of the via.

The present invention provides a process and a structure of forming conductive vias using a light guide. In an exemplary embodiment, the process includes providing a via in a base material in a direction perpendicular to a plane of the base material, applying a photoresist layer to an interior surface of the via, inserting a light guide into the via, exposing, by the light guide, a portion of the photoresist layer to light, thereby resulting in an exposed portion of the photoresist layer and an unexposed portion of the photoresist layer, removing a portion of the photoresist layer, and plating an area of the via, where the photoresist has been removed, with a metal, thereby resulting in a portion of the via plated with metal and a portion of the via not plated with metal.

Forming conductive vias using a light guide

Growing community of inventors

Rochester, MN, United States of America

Gerald Keith Bartley