Other

Tandy Corporation

Gerald E Gaulke

Dale Chatham

Jerry L Ballard

Video control circuitry for controlling the video format presented to the cathode ray tube or screen and capable of providing a combination of character generation and cell generation along with other video types of control. The video controller may comprise a video memory means for controlling writing into and reading therefrom and means defining both a memory address and a memory data. There is a video data bus coupled to the video memory means and a processor address bus. A cathode ray tube controller has address lines and the address lines are connected to multiplexer means for selecting either the controller address lines or the processor lines. Control means are provided for controlling the multiplexer means so that in one state thereof the video memory means is addressed from the cathode ray tube controller means and in the other state the video memory means is addressed from the central processing unit address. This occurs on an interleaved basis with the CRT clock basically operating at the normal refresh cycle rate. However, in accordance with the invention the CRT clock is essentially divided so that one half of the clock cycle is used for communication from the CPU to the video memory means. This provides for improved screen display.

Computer video control system

Video control circuitry for controlling the video format presented to the cathode ray tube to provide a combination of character generation and cell generation along with selective character inversion on a character-by-character basis. The video controller may comprise a video memory means for storing video character codes, character generator means and cell generator means both being coupled from the output of the video memory means in a common to a shift register. The shift register has associated therewith controls for the loading thereof and for the shifting of signals therefrom. Control signal means are provided having a video inverting and a video non-inverting state. At the output of the shift register, there is preferably provided output gating means. The aforementioned control signals couple to the output gating means for providing either inversion or non-inversion of the signal to the output gating means from the shift register. Depending upon the state of the control signal, the character information is either inverted or not inverted.

Video display generator having alternate display modes

Video control circuitry for controlling the video format presented to the cathod ray tube or screen and capable of providing a combination of character generation and cell generation along with other video types of control. The video controller may comprise a video memory means for controlling writing into and reading therefrom and means defining both a memory address and a memory data. There is a video data bus coupled to the video memory means and a processor address bus. A cathode ray tube controller has address lines and the address lines are connected to multiplexer means for selecting either the the controller address lines or the processor lines. Control means are provided for controlling the multiplexer means so that in one state thereof the video memory means is addressed from the cathode ray tube controller means and in the other state the video memory means is addressed from the central processing unit address. This occurs on an interleaved basis with the CRT clock basically operating at the normal refresh cycle rate. However, in accordance with the invention the CRT clock is essentially divided so that one half of the clock cycle is used for communication from the CPU to the video memory means. This provides for improved screen display.

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Lewisville, TX, United States of America

Gerald E Gaulke