Compagnie Internationale Pour L'informatique Cii-Honeywell Bull

Compagnie Honeywell Bull

Georges Lepicard

Marc Michel Appell

Benjamin S Franklin

Jacques Michel Bienvenu

Jean-Claude Marcel Cassonnet

John J Bradley

Philippe-Hubert De Rivet

Computer data and procedure protection by preventing processes from intering with each other or sharing each other's address space in an unauthorized manner is accomplished in hardware/firmware by restricting addressability to a segmented memory and by a ring protection mechanism. To protect information in segments shared by several processes from misuse by one of these processes a ring protection hardware system is utilized. There are four ring classes numbered 0 through 3. Each ring represents a level of system privilege with level 0 (the innermost ring) having the most privilege and level 3 (the outermost ring) the least. Every procedure in the system has a minimum and a maximum execute ring number assigned to it which specifies who may legally call the procedure. Also maximum write and read ring numbers specify the maximum ring numbers for which a write and/or read operation is permitted. Processes use a segmented address during execution wherein segment tables isolate the address space of the various processes in the system. Hardware checks that the address used by a process is part of the address space assigned to the process, and if the address is outside the prescribed address space, an exception occurs. A process cannot refer to data within the address space of another process because the hardware uses the segment table of the referencing process.

Protection of data in an information multiprocessing system by

A multiprogrammable/multiprocessing digital computer system having a process control block for each process in the system, wherein each process control block includes information which specifies the state of a processor at any given time. Associated with each process control block is a decor extension table having information to indicate whether a specified function, such as the emulation of another processor, may be executed in the system. A native mode instruction indicating a specified function for either one instruction or for a plurality of instructions, is first checked to determine proper format, after which a determination is made by means of the decor extension table, as to whether or not the system is capable of executing the specified function indicated by the native mode instruction. If such native mode is not erroneous and if there is a positive indication of executability of the specified function by the system, then the particular specified function, such as the emulation mode of another processor, is activated.

Method and apparatus for executing an extended decor instruction

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Vaucresson, France

Georges Lepicard