United States of America as Represented by the Administrator of Nasa

The United States of America as Represented by the Administrator of the

George Suarez

Jeffrey J Dumonthier

Gerard T Quilligan

Nikolaos Paschalidis

George E Winkert

Embodiments may provide a radiation hardened low-power data acquisition system-on-chip (SOC) suitable for space flight. The various embodiments may provide the radiation hardened low-power data acquisition SOC having a radiation hardened semiconductor die, a radiation hardened multiplexer integrated on the radiation hardened semiconductor die and configured to receive a plurality of analog signals and selectively output an analog signal of the plurality of analog signals, at least one radiation hardened analog to digital converted integrated on the radiation hardened semiconductor die and configured to convert the analog signal to a digital signal, and a radiation hardened serial communication interface integrated on the radiation hardened semiconductor die and configured to output the digital signal. The various embodiments may provide a computing having a processor and the radiation hardened low-power data acquisition SOC electrically coupled to the processor such that the digital signal is output to the processor.

Radiation hardened housekeeping slave node (RH-HKSN) application specific integrated circuit (ASIC) element

A radiation hardened, digital to analog converter includes first and second serial communication circuits, a common bus interface configured to connect the first and second serial communication circuits to first and second digital serial communication buses, respectively, and a digital to analog converter circuit, where the first and second serial communication circuits are configured to receive data over the first and second digital serial communication buses, respectively, for use by the digital to analog converter circuit.

Radiation hardened compact multi-channel digital to analog converter

The invention is a microcircuit configured as a compact, radiation hardened, low-power general purpose I/O expander. The expander may be controlled by an external microcontroller or central processing unit through a serial interface. The expander provides a simple solution to miniaturize static parallel I/O signals using a simplified serial interface such as IC or SPI.

Radiation hardened input/output expander with IC and SPI serial interfaces

A digital serial communication system includes a first serial communication circuit configured to exchange information utilizing a first communication protocol, a second serial communication circuit configured to exchange information utilizing a second communication protocol, and a common bus interface configured to couple the first serial communication circuit to a first serial communication bus implementing the first communication protocol, and configured to couple the second serial communication circuit to a second serial communication bus implementing the second communication protocol.

Dual I2C and SPI slave for FPGA and ASIC implementation

Time-to-digital converters adapted to analog and digital inputs and methods of use are described. A time-to-digital converter has an event frame latches and logic module with memory cells, an analog front-end module connected to the memory cells, and a bin increment generator module connected to the memory cells. The bin increment generator is configured to issue bin increments separated by a time increment, and the analog front end is configured to issue a start event followed by a plurality of stop events. Upon receipt of a first time increment following a start event, the event frame latches and logic module updates a first memory cell with a first bit-type; upon receipt of a second time increment following an intervening stop event, the event frame latches and logic module updates a second memory cell with a second bit-type different from the first bit-type.

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Columbia, MD, United States of America

George Suarez