Industrial Technology Research Institute

George Shiang-Jyh Lai

Ruey-Liang Ma

Kun-Cheng Wu

Shi-Sheng Shang

Dze-chaung Wang

A processor is provided with a decoder, a memory connected to the decoder and an execution stage connected to the decoder. The decoder receives each instruction. Each time the decoder receives an instruction, if the instruction contains a symbolic reference, the decoder determines whether or not the symbolic reference has been resolved into a numeric operand. If the symbolic reference has been resolved into a numeric operand, the memory retrieves, from a numeric reference table, a numeric operand to which the symbolic reference has been resolved. The execution stage then executes the instruction on the retrieved numeric operand in place of the symbolic reference. If the symbolic reference has not been resolved into a numeric operand, then the execution stage searches a data object, which relates each symbolic reference to a memory slot in which a corresponding numeric operand is stored, for a numeric reference relating the symbolic reference to a corresponding numeric operand. The memory then retrieves the numeric operand, that corresponds to the unresolved symbolic reference, from the memory slot indicated by the numeric reference of the data object. The memory stores the retrieved numeric operand in the numeric reference table maintained therein. The execution stage executes the instruction on the retrieved numeric operand in place of the symbolic reference of the instruction and indicates to the decoder that the symbolic reference is resolved. &ldquo;Resolved indications,&rdquo; which each indicates whether or not a specific, respective symbolic reference is resolved, can be stored in a numeric reference buffer and accessed using the instruction fetch address as an index. The numeric reference table can also be stored in the numeric reference buffer and accessed (indexed) the same way.

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Taipei, Taiwan

George Shiang-Jyh Lai