Arm Limited

George Robert Scott Lloyd

Andrew David Tune

Daniel Adam Sara

Sean James Salisbury

Peter Andrew Riocreux

Jamshed Jalal

Mark David Werkheiser

Arthur Brian Laughton

Ian David Andrews

A crossbar switch comprises two or more data inputs, two or more data outputs, a bufferbetween the inputs and the outputs, an arbiterassociated with each output and configured to select data from one of the inputs when there is contention at the output, a bypassassociated with the buffer so that the buffer can be enabled or disabled, and a buffer controllerconfigured to enable or disable the buffer. The buffer controller further includes an accumulatorconfigured to assess whether a time-based average of the contention rate, or an average injection rate, at the output associated with the buffer, has reached a predetermined threshold. This prevents the buffer being enabled when the contention is only intermittent, which reduces power consumption without significant loss of performance.

Switching device using buffering

An interconnect, and method of operation of an interconnect, are provided for connecting a plurality of master devices and a plurality of slave devices. Hazard management circuitry is used to serialize transactions to overlapping addresses. In addition, gating circuitry ensures ordered write observation (OWO) behavior at an interface to one or more of the master devices, the gating circuitry receiving write address transfers of write transactions and performing a gating operation to gate onward propagation of the write address transfers to the slave devices in order to ensure the OWO behavior. The gating circuitry performs the gating operation under control of the hazard management circuitry. Hence, for write transactions that are subjected to hazard checking by the hazard management circuitry, this removes the need to implement any other processes to specifically manage OWO behavior for those write transactions.

Interconnect and method of operation of an interconnect for ordered write observation (OWO)

An interconnect has coherency control circuitry for performing coherency control operations and a snoop filter for identifying which devices coupled to the interconnect have cached data from a given address. When an address is looked up in the snoop filter and misses, and there is no spare snoop filter entry available, then the snoop filter selects a victim entry corresponding to a victim address, and issues an invalidate transaction for invalidating locally cached copies of the data identified by the victim. The coherency control circuitry for performing coherency checking operations for data access transactions is reused for performing coherency control operations for the invalidate transaction issued by the snoop filter. This greatly reduces the circuitry complexity of the snoop filter.

Coherency checking of invalidate transactions caused by snoop filter eviction in an integrated circuit

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Sheffield, United Kingdom

George Robert Scott Lloyd