International Business Machines Corporation

George P Taylor

Joel C Leininger

Richard Eugene Birney

Richard N Ames

Dick K Hardin

An interface comprising normal asynchronous I/O interface hardware in combination with certain additional synchronizing connections is provided between a microcoded central processing unit (CPU) and a microcoded secondary processor (such as a floating point processor) for enabling these processors to function conjointly under common timing control as though they were natively attached to each other insofar as the execution of their respective microcodes is concerned. The secondary processor shares the normal I/O interface with the I/O devices for data transfer purposes in such fashion that data can be transferred between any of the I/O devices and the CPU in cycle steal mode when the secondary processor is internally occupied with executing an operation delegated to it by the central processor, and when the secondary processor is ready to store data which it has produced, I/O data transfers in cycle steal mode can be made concurrently with data transfers between the secondary processor and the CPU on a demand multiplex basis. Coordinating signals are passed between the processors at certain steps during the execution of their respective microcodes to maintain these microcodes in proper timed relationship with each other.

Synchronous microcode generated interface for system of microcoded data

This carry save adder (CSA) utilizes a pair of edge-triggered flip-flops as output manifesting elements at each CSA bit position, one of these flip-flops being the 'sum trigger' which registers the half-sum value (herein called the 'sum bit'), and the other flip-flop of the pair being the 'carry trigger' which registers the carry value resulting from the binary addition performed by the CSA at that bit position. Each trigger has a latch portion for storing a sum or carry bit value that can be set or changed only at the leading edge of a clock pulse, being stable in the period between clock pulses. A latched sum or carry output bit value at any CSA bit position can be re-entered at any time as input to the same bit position or another CSA bit position, depending upon the operation to be performed (add, left or right shift, or complement). Each trigger also produces an unlatched output sum or carry value known as a 'presum' or 'precarry' bit. These unlatched bit values may be utilized for trial or test purposes, such as inputs to a lookahead logic network for determining whether a proposed complemental subtraction in a division operation can or cannot be successfully performed.

Carry save adder

A carry save adder (CSA) is adapted for use in dividing operations by providing it with a lookahead capability whereby it accurately predicts whether or not each of the proposed complemental subtractions in a division process could be successfully performed if actually attempted, and it actually performs only those subtractions that will not result in overdrafts. Each bit position of the carry save adder is arranged to receive sum, carry and data inputs and to furnish sum, carry, presum and precarry outputs. The sum and carry output bits are latched and remain undisturbed until the next complemental subtraction is performed. The presum and precarry bits are not latched and are fed into a lookahead logic network which analyzes the presum and precarry bit patterns derived from all of the CSA bit positions to determine rapidly by a logical trial procedure whether the divisor could be subtracted from the dividend or partial remainder value currently registered in the sum and carry latches of the CSA without causing an overdraft. While this trial procedure is in progress, the presum and precarry values may change without altering the latched sum and carry values. If the trial procedure indicates that a proposed complemental subtraction would be unsuccessful, then such subtraction will be skipped without actually being performed by the CSA, thus eliminating the necessity of determining whether overdrafts have occurred and correcting the overdrafts.

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Boca Raton, FL, United States of America

George P Taylor