Other

Mentor Graphics Corporation

George P Lippincott

Laurence W Grodd

Kyohei Sakajiri

Nicolas Bailey Cobb

Emile Y Sahouria

Juan Andres Torres Robles

Mark C Simmons

Christopher E Reid

Andrew Michael Jost

Yuri Granik

Junjiang Lei

Robert A Todd

Le Hong

Sergiy Komirenko

Nick Cobb

Zhitang Yu

Sergey Kobelkov

Xima Zhang

Sergly M Komirenko

Aspects of the disclosed technology relate to techniques for achieving optical proximity correction cross-tile consistency. A layout design is divided into a plurality of regions. Optical proximity correction iterations are performed on each of the plurality of regions to generate a modified layout design. Based on the modified layout design and the layout pattern surrounding each of the edge fragments in the modified layout design, a final modified layout design is generated such that the edge fragments in different regions in the plurality of regions in the final modified layout design having the same layout pattern have a same edge adjustment value with respect to the layout design.

Method and system for cross-tile OPC consistency

Various aspects of the disclosed technology relate to techniques of retargeting layout features. A process window simulation on a layout design is performed to generate process window information that comprises predicted print positions of layout features computed under various process conditions. Retargeted print positions for a plurality of edge fragments in the layout design are then determined based on minimizing a combined change of targeted print positions for the plurality of edge fragments under constraints represented based on the process window information and specification limits for printed layout features. Based on the retargeted print positions, positions of the plurality of edge fragments are adjusted for optical proximity correction.

Simultaneous retargeting of layout features based on process window simulation

Aspects of the invention relate to techniques for applying edge fragment correlation information to optical proximity correction. Conventional edge adjustment values for the edge fragments are first derived from edge placement error values. Neighbor-aware edge adjustment values for the edge fragments are then computed based on the edge placement error values, the conventional edge adjustment values and edge fragment correlation information. The computation comprises: calculating pseudo edge placement error values by subtracting neighboring edge movement contribution values from the edge placement error values and calculating the neighbor-aware edge adjustment values based on the pseudo edge placement error values. The computed neighbor-aware edge adjustment values are combined with conventional edge adjustment values and the edge fragments are adjusted accordingly. The process may be repeated for a number of times.

Optical proximity correction based on edge fragment correlation

An integrated circuit verification system provides an indication of conflicts between an OPC suggested correction and a manufacturing rule. The indication specifies which edge segments are in conflict so that a user may remove the conflict to achieve a better OPC result. In another embodiment of the invention, edge segments are assigned a priority such that the correction of a lower priority edge does not hinder a desired OPC correction of a higher priority edge.

OPC conflict identification and edge priority system

Aspects of the invention relate to techniques for repairing layout design defects after layout data have been processed by resolution enhancement techniques. The repair process first determines a re-correction region that includes three portions: core, transition and visible portions. An inverse lithography process is then performed on the core and transition portions of the re-correction region while taking into account effects from the visible portion to generate a modified re-correction region. The transition portion is processed based on distance from boundary between the transition portion and the core portion such that layout features near the boundary between the transition portion and the core portion are adjusted more than layout features farther away from the boundary.

Layout design defect repair using inverse lithography

Aspects of the invention relate to retargeting based on process window simulation to fix hotspots. The process window simulation is performed to generate process window information. Edge fragments are selected for retargeting. Based on the process window information, the selected edge fragments are retargeted in a balanced way.

Retargeting based on process window simulation

Layout design data are decomposed for double dipole lithography based on partial intensity distribution information. The partial intensity distribution information is generated by performing optical simulations on the layout design data. The layout decomposition may further be adjusted during an optical proximity correction process. The adjustment may utilize the partial intensity distribution information.

Layout decomposition based on partial intensity distribution

Method and apparatus for generating a pair of layouts suitable for forming exposure mask to use in a double dipole lithographic process are disclosed. With some implementations, a y-dipole layout and an x-dipole layout are generated by decomposing a target layout. Subsequently, an optical proximity correction process is implemented on the y-dipole layout and the x-dipole layout. The decomposition may designate ones of the edge segments in the target layout at major edge segments and other ones of the edge segments as minor edge segments. A higher feedback value may then be assigned to the minor edges than the major edges. Subsequently, a few iterations of an optical proximity correction process that utilizes a smaller than intended mask rule constraint value and the assigned feedback values is implemented on the target layout. The minor edges separated by a distance of less than the intended mask rule constraint distance are then collapsed. After which, a few iterations of the optical proximity correction process are allowed to iterate. In further implementations, once the y-dipole and x-dipole layouts have been generated. An additional optical proximity correction process is implemented on the layouts. During this optical proximity correction process, a higher feedback values is again assigned to the minor edge segments. At a point during the optical proximity correction process, minor edges within portions of the layouts that have a bias value larger than a predetermined value are expanded back from their collapsed position.

Mask decomposition for double dipole lithography

A pre-bias optical proximity correction (OPC) method allows faster convergence during OPC iterations, providing an initial set of conditions to edge fragments of a layout based on density conditions near the edge fragments.

Pre-bias optical proximity correction

An edge-smoothing process identifies a target edge fragment among a number of edge fragments that form a feature in a photolithographic design. Each of the edge fragments has a length and a classification. The length of the target edge fragment is less than a minimum scatter bar length. The target edge fragment is also classified so that it will receive a scatter bar, and the target edge fragment has a collinear edge fragment. The target edge fragment is smoothed in conjunction with the collinear edge fragment to increase the length of the target edge fragment.

Short edge smoothing for enhanced scatter bar placement

An integrated circuit verification system provides an indication of conflicts between an OPC suggested correction and a manufacturing rule. The indication specifies which edges segments are in conflict so that a user may remove the conflict to achieve a better OPC result. In another embodiment of the invention, edge segments are assigned a priority such that the correction of a lower priority edge does not hinder a desired OPC correction of a higher priority edge.

A tool for optimizing the layout of a microdevice adds fragmentation points to polygons in a first hierarchical database layer in a manner suitable for application of a tool to apply a resolution enhancement technique (RET) such as optical and process correction (OPC). Portions of polygons in a database level that interact with polygons of a second level in the database are promoted to the second database level, and refragmented. The RET operates on the polygons of the first and second levels of the database to determine how polygons of each of the first and second levels should be adjusted, if necessary, such that the layout is optimized.

Selective promotion for resolution enhancement techniques

The invention discloses a method and apparatus for modifying, as appropriate, the geometries of a polygon. Based on various attributes associated with the polygon and its surroundings, modification of the location of the edge segments may conditionally occur. Additionally, if these modifications occur, a method to minimize the introduction of short edges during the modification is provided.

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Lake Oswego, OR, United States of America

George P Lippincott