Codex Corporation

George P Chamberlin

Shahid U Qureshi

Apparatus for enabling a first processor to cause a second processor to effect a transfer of data between the processors in accordance with data transfer commands sent from the first processor to the second processor is described. The processors each have a program instruction memory for enabling the processors to operate independently and simultaneously when no data transfer is occurring between them, and the apparatus includes data transfer circuitry connected between the processors for enabling the data to be transferred, a program instruction decoder associated with the second processor for normally decoding and executing instructions stored in the program instruction memory of the second processor when no data transfer is occurring, and routing circuitry for carrying the data transfer commands from the first processor to the program instruction decoder for decoding to provide signals to the data transfer circuitry to effect a transfer of data.

Processor interface circuitry for effecting data transfers between

A two-pass Multiplier/Accumulator Circuit is provided which performs various arithmetic operations on operands contained within an X Register 10 (FIG. 1) and a Y Register 20 and places the result in an Accumulator Register 40. The arithmetic operations are carried out by passing the product of the operands successively through an array of adders in the Adder unit 34. Each adder adds an appropriate multiple of the contents of the X Register to the Accumulator 40 or to the output of the previous adder. The multiples are selected according to the contents of the Y Register. The X and Y Registers are fully buffered so that additional data transfers and functions may be performed while an arithmetic operation is in progress in a 'pipeline' manner. The circuit is also capable of indicating the maximum or minimum value in a sequence of numbers in response to a single computer instruction to the circuit.

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Scottsdale, AZ, United States of America

George P Chamberlin